Searched refs:dml_input (Results 1 – 5 of 5) sorted by relevance
373 ….soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us; in dcn30_fpu_update_soc_for_wm_a()528 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()672 base->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_fpu_build_wm_range_table()673 base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn3_fpu_build_wm_range_table()674 …base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_ex… in dcn3_fpu_build_wm_range_table()694 base->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 0; in dcn3_fpu_build_wm_range_table()695 base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn3_fpu_build_wm_range_table()696 …base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_ex… in dcn3_fpu_build_wm_range_table()713 base->bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_fpu_build_wm_range_table()714 base->bw_params->wm_table.nv_entries[WM_D].dml_input.sr_exit_time_us = 2; in dcn3_fpu_build_wm_range_table()[all …]
190 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()192 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()202 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()204 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()215 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn32_build_wm_range_table_fpu()217 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()238 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.sr_exit_time_us = sr_exit_time_us / 2… in dcn32_build_wm_range_table_fpu()1954 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()1979 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()2189 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()[all …]
142 } dml_input; member
423 struct _vcs_dpi_display_e2e_pipe_params_st dml_input; member
464 struct _vcs_dpi_display_e2e_pipe_params_st *input = &pipe->dml_input; in dcn_bw_calc_rq_dlg_ttu()
Completed in 16 milliseconds