| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 74 struct dmub_srv;
318 void (*init)(struct dmub_srv *dmub);
320 void (*reset)(struct dmub_srv *dmub);
324 void (*backdoor_load)(struct dmub_srv *dmub,
331 void (*setup_windows)(struct dmub_srv *dmub,
338 void (*setup_mailbox)(struct dmub_srv *dmub,
352 void (*setup_outbox0)(struct dmub_srv *dmub,
365 bool (*is_hw_init)(struct dmub_srv *dmub);
367 bool (*is_phy_init)(struct dmub_srv *dmub);
376 void (*set_gpint)(struct dmub_srv *dmub,
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn32.h | 31 struct dmub_srv;
187 void dmub_dcn32_reset(struct dmub_srv *dmub);
189 void dmub_dcn32_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn32_backdoor_load(struct dmub_srv *dmub,
199 void dmub_dcn32_setup_windows(struct dmub_srv *dmub,
206 void dmub_dcn32_setup_mailbox(struct dmub_srv *dmub,
220 bool dmub_dcn32_is_hw_init(struct dmub_srv *dmub);
222 bool dmub_dcn32_is_supported(struct dmub_srv *dmub);
224 void dmub_dcn32_set_gpint(struct dmub_srv *dmub,
227 bool dmub_dcn32_is_gpint_acked(struct dmub_srv *dmub,
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| A D | dmub_dcn20.h | 31 struct dmub_srv;
185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
216 void dmub_dcn20_setup_outbox0(struct dmub_srv *dmub,
223 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub);
225 bool dmub_dcn20_is_supported(struct dmub_srv *dmub);
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| A D | dmub_dcn31.h | 31 struct dmub_srv;
187 void dmub_dcn31_init(struct dmub_srv *dmub);
189 void dmub_dcn31_reset(struct dmub_srv *dmub);
191 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
193 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
197 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
204 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
218 bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub);
220 bool dmub_dcn31_is_supported(struct dmub_srv *dmub);
222 void dmub_dcn31_set_gpint(struct dmub_srv *dmub,
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| A D | dmub_dcn32.c | 84 void dmub_dcn32_reset(struct dmub_srv *dmub) in dmub_dcn32_reset()
136 void dmub_dcn32_reset_release(struct dmub_srv *dmub) in dmub_dcn32_reset_release()
145 void dmub_dcn32_backdoor_load(struct dmub_srv *dmub, in dmub_dcn32_backdoor_load()
208 void dmub_dcn32_setup_windows(struct dmub_srv *dmub, in dmub_dcn32_setup_windows()
261 void dmub_dcn32_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn32_setup_mailbox()
278 void dmub_dcn32_setup_out_mailbox(struct dmub_srv *dmub, in dmub_dcn32_setup_out_mailbox()
303 bool dmub_dcn32_is_hw_init(struct dmub_srv *dmub) in dmub_dcn32_is_hw_init()
314 bool dmub_dcn32_is_supported(struct dmub_srv *dmub) in dmub_dcn32_is_supported()
323 void dmub_dcn32_set_gpint(struct dmub_srv *dmub, in dmub_dcn32_set_gpint()
329 bool dmub_dcn32_is_gpint_acked(struct dmub_srv *dmub, in dmub_dcn32_is_gpint_acked()
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| A D | dmub_dcn31.c | 83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset()
144 void dmub_dcn31_reset_release(struct dmub_srv *dmub) in dmub_dcn31_reset_release()
152 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub, in dmub_dcn31_backdoor_load()
185 void dmub_dcn31_setup_windows(struct dmub_srv *dmub, in dmub_dcn31_setup_windows()
238 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn31_setup_mailbox()
280 bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub) in dmub_dcn31_is_hw_init()
291 bool dmub_dcn31_is_supported(struct dmub_srv *dmub) in dmub_dcn31_is_supported()
300 void dmub_dcn31_set_gpint(struct dmub_srv *dmub, in dmub_dcn31_set_gpint()
306 bool dmub_dcn31_is_gpint_acked(struct dmub_srv *dmub, in dmub_dcn31_is_gpint_acked()
369 void dmub_dcn31_setup_outbox0(struct dmub_srv *dmub, in dmub_dcn31_setup_outbox0()
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| A D | dmub_dcn20.c | 87 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub) in dmub_dcn20_use_cached_inbox()
94 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset()
146 void dmub_dcn20_reset_release(struct dmub_srv *dmub) in dmub_dcn20_reset_release()
154 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub, in dmub_dcn20_backdoor_load()
189 void dmub_dcn20_setup_windows(struct dmub_srv *dmub, in dmub_dcn20_setup_windows()
273 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn20_setup_mailbox()
325 void dmub_dcn20_setup_outbox0(struct dmub_srv *dmub, in dmub_dcn20_setup_outbox0()
343 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) in dmub_dcn20_is_hw_init()
352 bool dmub_dcn20_is_supported(struct dmub_srv *dmub) in dmub_dcn20_is_supported()
361 void dmub_dcn20_set_gpint(struct dmub_srv *dmub, in dmub_dcn20_set_gpint()
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| A D | dmub_srv.c | 309 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, in dmub_srv_create()
359 void dmub_srv_destroy(struct dmub_srv *dmub) in dmub_srv_destroy()
365 dmub_srv_calc_region_info(struct dmub_srv *dmub, in dmub_srv_calc_region_info()
440 enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, in dmub_srv_calc_fb_info()
503 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, in dmub_srv_hw_init()
647 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub) in dmub_srv_hw_reset()
669 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, in dmub_srv_cmd_queue()
681 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub) in dmub_srv_cmd_execute()
745 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, in dmub_srv_wait_for_idle()
771 dmub_srv_send_gpint_command(struct dmub_srv *dmub, in dmub_srv_send_gpint_command()
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| A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| A D | dmub_reg.h | 31 struct dmub_srv;
115 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
121 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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| A D | dmub_reg.c | 72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update()
89 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, in dmub_reg_set()
104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, in dmub_reg_get()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_hw_lock_mgr.c | 31 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_cmd() argument
50 dc_dmub_srv_cmd_queue(dmub_srv, &cmd); in dmub_hw_lock_mgr_cmd()
51 dc_dmub_srv_cmd_execute(dmub_srv); in dmub_hw_lock_mgr_cmd()
52 dc_dmub_srv_wait_idle(dmub_srv); in dmub_hw_lock_mgr_cmd()
55 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_inbox0_cmd() argument
61 dc_dmub_srv_clear_inbox0_ack(dmub_srv); in dmub_hw_lock_mgr_inbox0_cmd()
62 dc_dmub_srv_send_inbox0_cmd(dmub_srv, data); in dmub_hw_lock_mgr_inbox0_cmd()
63 dc_dmub_srv_wait_for_inbox0_ack(dmub_srv); in dmub_hw_lock_mgr_inbox0_cmd()
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| A D | dmub_abm.c | 74 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_enable_fractional_pwm()
75 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
76 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
166 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_level()
167 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_level()
168 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_level()
199 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_init_config()
200 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_init_config()
201 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_init_config()
220 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_pause()
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| A D | dmub_psr.c | 102 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
169 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_set_version()
170 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_version()
199 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_enable()
200 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_enable()
250 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_level()
271 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_sink_vtotal_in_psr_active()
292 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_power_opt()
424 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_copy_settings()
447 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_force_static()
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| A D | dmub_outbox.c | 39 void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv) in dmub_enable_outbox_notification() argument
51 dc_dmub_srv_cmd_queue(dmub_srv, &cmd); in dmub_enable_outbox_notification()
52 dc_dmub_srv_cmd_execute(dmub_srv); in dmub_enable_outbox_notification()
53 dc_dmub_srv_wait_idle(dmub_srv); in dmub_enable_outbox_notification()
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| A D | dmub_hw_lock_mgr.h | 32 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,
37 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 39 struct dmub_srv *dmub) in dc_dmub_srv_construct()
62 if (*dmub_srv) { in dc_dmub_srv_destroy()
63 kfree(*dmub_srv); in dc_dmub_srv_destroy()
64 *dmub_srv = NULL; in dc_dmub_srv_destroy()
124 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_clear_inbox0_ack()
137 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_wait_for_inbox0_ack()
151 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_send_inbox0_cmd()
164 struct dmub_srv *dmub; in dc_dmub_srv_cmd_with_reply_data()
211 struct dmub_srv *dmub; in dc_dmub_srv_notify_stream_mask()
226 struct dmub_srv *dmub; in dc_dmub_srv_is_restore_required()
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| A D | dc_helper.c | 154 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in dmub_flush_buffer_execute()
162 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in dmub_flush_burst_write_buffer_execute()
259 if (ctx->dmub_srv && in generic_reg_update_ex()
290 if (ctx->dmub_srv && in generic_reg_set_ex()
459 if (ctx->dmub_srv && in generic_reg_wait()
519 if (ctx->dmub_srv && in generic_read_indirect_reg()
660 &ctx->dmub_srv->reg_helper_offload; in reg_sequence_start_gather()
673 if (!ctx->dmub_srv) in reg_sequence_start_execute()
695 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in reg_sequence_start_execute()
704 if (!ctx->dmub_srv) in reg_sequence_wait_done()
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| A D | dc_dmub_srv.h | 32 struct dmub_srv;
48 struct dmub_srv *dmub;
80 void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub);
82 void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);
83 void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);
84 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data…
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_stat.c | 59 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification()
92 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_hwseq.c | 155 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_pipe()
156 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_pipe()
157 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_pipe()
225 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dcn21_set_backlight_level()
226 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dcn21_set_backlight_level()
227 dc_dmub_srv_wait_idle(dc->dmub_srv); in dcn21_set_backlight_level()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/bios/ |
| A D | command_table2.c | 183 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_digx_v1_5()
199 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_fallback()
300 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_6()
369 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_7()
385 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_fallback()
517 if (bp->base.ctx->dc->ctx->dmub_srv && in set_pixel_clock_v7()
533 if (bp->base.ctx->dc->ctx->dmub_srv && in set_pixel_clock_fallback()
831 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_disp_power_gating_v2_1()
849 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_disp_power_gating_fallback()
1033 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_lvtma_control()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| A D | link_dp_dpia.c | 85 struct dc_dmub_srv *dmub_srv = link->ctx->dmub_srv; in dc_link_dpia_query_hpd_status() local
94 …if (dc_dmub_srv_cmd_with_reply_data(dmub_srv, &cmd) && cmd.query_hpd.data.status == AUX_RET_SUCCES… in dc_link_dpia_query_hpd_status()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_hwseq.c | 725 if (!dc->ctx->dmub_srv) in dcn30_apply_idle_power_optimizations()
746 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
747 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
869 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
870 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
871 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
887 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
888 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
905 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
906 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hwseq.c | 202 dmub_enable_outbox_notification(dc->ctx->dmub_srv); in dcn31_init_hw()
441 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_save_init()
442 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_save_init()
443 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_save_init()
454 if (!dc_dmub_srv_is_restore_required(dc->ctx->dmub_srv)) in dcn31_z10_restore()
461 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_restore()
462 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_restore()
463 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_restore()
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