/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
A D | dcn20_dpp_cm.c | 51 struct dpp *dpp_base) in dpp2_enable_cm_block() argument 65 struct dpp *dpp_base, in dpp2_degamma_ram_inuse() argument 86 struct dpp *dpp_base, in dpp2_program_degamma_lut() argument 117 struct dpp *dpp_base, in dpp2_set_degamma_pwl() argument 135 struct dpp *dpp_base, in dpp2_set_degamma() argument 214 struct dpp *dpp_base, in dpp2_cm_set_gamut_remap() argument 238 struct dpp *dpp_base, in dpp2_program_input_csc() argument 311 struct dpp *dpp_base, in dpp20_power_on_blnd_lut() argument 322 struct dpp *dpp_base, in dpp20_configure_blnd_lut() argument 335 struct dpp *dpp_base, in dpp20_program_blnd_pwl() argument [all …]
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A D | dcn20_dpp.c | 51 void dpp20_read_state(struct dpp *dpp_base, in dpp20_read_state() argument 54 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_read_state() 76 struct dpp *dpp_base, in dpp2_power_on_obuf() argument 79 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_power_on_obuf() 91 struct dpp *dpp_base, in dpp2_dummy_program_input_lut() argument 96 struct dpp *dpp_base, in dpp2_cnv_setup() argument 103 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cnv_setup() 253 dpp2_power_on_obuf(dpp_base, true); in dpp2_cnv_setup() 315 struct dpp *dpp_base, in dpp2_cnv_set_alpha_keyer() argument 318 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cnv_set_alpha_keyer() [all …]
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A D | dcn20_hwseq.c | 918 result = dpp_base->funcs->dpp_program_3dlut(dpp_base, in dcn20_set_shaper_3dlut() 921 result = dpp_base->funcs->dpp_program_3dlut(dpp_base, NULL); in dcn20_set_shaper_3dlut() 947 dpp_base->funcs->dpp_set_degamma(dpp_base, in dcn20_set_input_transfer_func() 957 dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, in dcn20_set_input_transfer_func() 962 dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, in dcn20_set_input_transfer_func() 973 dpp_base->funcs->dpp_set_degamma(dpp_base, in dcn20_set_input_transfer_func() 977 dpp_base->funcs->dpp_set_degamma(dpp_base, in dcn20_set_input_transfer_func() 981 dpp_base->funcs->dpp_set_degamma(dpp_base, in dcn20_set_input_transfer_func() 987 dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, &dpp_base->degamma_params); in dcn20_set_input_transfer_func() 995 dpp_base->funcs->dpp_set_degamma(dpp_base, in dcn20_set_input_transfer_func() [all …]
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A D | dcn20_dpp.h | 713 struct dpp *dpp_base, 717 struct dpp *dpp_base, 721 struct dpp *dpp_base, 725 struct dpp *dpp_base, 734 struct dpp *dpp_base, 738 struct dpp *dpp_base, 742 struct dpp *dpp_base, 752 struct dpp *dpp_base, 756 struct dpp *dpp_base, 765 struct dpp *dpp_base, [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
A D | dcn30_dpp.c | 55 struct dpp *dpp_base, in dpp3_program_post_csc() argument 171 struct dpp *dpp_base, in dpp3_cnv_setup() argument 352 struct dpp *dpp_base, in dpp3_set_cursor_attributes() argument 531 struct dpp *dpp_base, in dpp3_power_on_blnd_lut() argument 551 struct dpp *dpp_base, in dpp3_power_on_hdr3dlut() argument 568 struct dpp *dpp_base, in dpp3_power_on_shaper() argument 585 struct dpp *dpp_base, in dpp3_configure_blnd_lut() argument 598 struct dpp *dpp_base, in dpp3_program_blnd_pwl() argument 659 struct dpp *dpp_base, in dpp3_program_blnd_luta_settings() argument 687 struct dpp *dpp_base, in dpp3_program_blnd_lutb_settings() argument [all …]
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A D | dcn30_dpp_cm.c | 44 struct dpp *dpp_base) in dpp3_enable_cm_block() argument 51 if (dpp_base->ctx->dc->debug.cm_in_bypass) in dpp3_enable_cm_block() 81 struct dpp *dpp_base, in dpp3_program_gammcor_lut() argument 130 struct dpp *dpp_base, in dpp3_power_on_gamcor_lut() argument 149 struct dpp *dpp_base, in dpp3_program_cm_dealpha() argument 160 struct dpp *dpp_base, in dpp3_program_cm_bias() argument 205 struct dpp *dpp_base, in dpp3_configure_gamcor_lut() argument 226 dpp3_enable_cm_block(dpp_base); in dpp3_program_gamcor_lut() 234 dpp3_power_on_gamcor_lut(dpp_base, true); in dpp3_program_gamcor_lut() 308 struct dpp *dpp_base, in dpp3_set_hdr_multiplier() argument [all …]
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A D | dcn30_hwseq.c | 85 blend_lut = &dpp_base->regamma_params; in dcn30_set_blend_lut() 88 result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut); in dcn30_set_blend_lut() 110 &dpp_base->shaper_params, true); in dcn30_set_mpc_shaper_3dlut() 111 shaper_lut = &dpp_base->shaper_params; in dcn30_set_mpc_shaper_3dlut() 156 if (dpp_base == NULL || plane_state == NULL) in dcn30_set_input_transfer_func() 165 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn30_set_input_transfer_func() 172 &dpp_base->degamma_params, false)) in dcn30_set_input_transfer_func() 173 params = &dpp_base->degamma_params; in dcn30_set_input_transfer_func() 176 result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params); in dcn30_set_input_transfer_func() 179 if (dpp_base->funcs->dpp_program_blnd_lut) in dcn30_set_input_transfer_func() [all …]
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A D | dcn30_dpp.h | 588 struct dpp *dpp_base, 591 void dpp30_read_state(struct dpp *dpp_base, 600 struct dpp *dpp_base, 608 struct dpp *dpp_base, 612 struct dpp *dpp_base, 616 struct dpp *dpp_base, 619 void dpp3_set_pre_degam(struct dpp *dpp_base, 623 struct dpp *dpp_base, 627 struct dpp *dpp_base, 633 struct dpp *dpp_base, [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
A D | dcn10_dpp_cm.c | 161 struct dpp *dpp_base, in dpp1_cm_set_gamut_remap() argument 240 struct dpp *dpp_base, in dpp1_cm_set_output_csc_default() argument 310 struct dpp *dpp_base, in dpp1_cm_set_output_csc_adjustment() argument 351 struct dpp *dpp_base, in dpp1_cm_configure_regamma_lut() argument 365 struct dpp *dpp_base, in dpp1_cm_program_regamma_luta_settings() argument 394 struct dpp *dpp_base, in dpp1_cm_program_regamma_lutb_settings() argument 421 struct dpp *dpp_base, in dpp1_program_input_csc() argument 497 struct dpp *dpp_base, in dpp1_program_bias_and_scale() argument 518 struct dpp *dpp_base, in dpp1_program_degamma_lutb_settings() argument 547 struct dpp *dpp_base, in dpp1_program_degamma_luta_settings() argument [all …]
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A D | dcn10_dpp.c | 94 void dpp_read_state(struct dpp *dpp_base, in dpp_read_state() argument 97 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_read_state() 188 void dpp_reset(struct dpp *dpp_base) in dpp_reset() argument 190 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_reset() 224 dpp1_cm_power_on_regamma_lut(dpp_base, true); in dpp1_cm_set_regamma_pwl() 260 struct dpp *dpp_base, in dpp1_set_degamma_format_float() argument 275 struct dpp *dpp_base, in dpp1_cnv_setup() argument 411 struct dpp *dpp_base, in dpp1_set_cursor_attributes() argument 432 struct dpp *dpp_base, in dpp1_set_cursor_position() argument 490 struct dpp *dpp_base, in dpp1_cnv_set_optional_cursor_attributes() argument [all …]
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A D | dcn10_dpp_dscl.c | 127 struct dpp *dpp_base, in dpp1_dscl_get_dscl_mode() argument 133 if (dpp_base->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT) { in dpp1_dscl_get_dscl_mode() 161 struct dpp *dpp_base, in dpp1_power_on_dscl() argument 164 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_power_on_dscl() 630 void dpp1_dscl_set_scaler_manual_scale(struct dpp *dpp_base, in dpp1_dscl_set_scaler_manual_scale() argument 634 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_dscl_set_scaler_manual_scale() 636 dpp_base, scl_data, dpp_base->ctx->dc->debug.always_scale); in dpp1_dscl_set_scaler_manual_scale() 647 if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl) { in dpp1_dscl_set_scaler_manual_scale() 649 dpp1_power_on_dscl(dpp_base, true); in dpp1_dscl_set_scaler_manual_scale() 672 if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl) in dpp1_dscl_set_scaler_manual_scale() [all …]
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A D | dcn10_dpp.h | 1378 struct dpp *dpp_base, 1382 struct dpp *dpp_base, 1404 struct dpp *dpp_base, 1408 struct dpp *dpp_base, 1412 struct dpp *dpp_base, 1416 struct dpp *dpp_base, 1422 struct dpp *dpp_base, 1426 struct dpp *dpp_base, 1432 struct dpp *dpp_base, 1460 struct dpp *dpp_base, [all …]
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A D | dcn10_hw_sequencer.c | 1768 if (dpp_base == NULL) in dcn10_set_input_transfer_func() 1778 dpp_base->funcs->dpp_program_input_lut(dpp_base, plane_state->gamma_correction); in dcn10_set_input_transfer_func() 1781 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS); in dcn10_set_input_transfer_func() 1785 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_sRGB); in dcn10_set_input_transfer_func() 1788 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_xvYCC); in dcn10_set_input_transfer_func() 1791 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS); in dcn10_set_input_transfer_func() 1794 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL); in dcn10_set_input_transfer_func() 1796 dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, &dpp_base->degamma_params); in dcn10_set_input_transfer_func() 1804 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS); in dcn10_set_input_transfer_func() 1808 dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, in dcn10_set_input_transfer_func() [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/hw/ |
A D | dpp.h | 161 struct dpp *dpp_base, 224 struct dpp *dpp_base, 228 struct dpp *dpp_base, 235 struct dpp *dpp_base, 242 void (*dpp_full_bypass)(struct dpp *dpp_base); 245 struct dpp *dpp_base, 249 struct dpp *dpp_base, 257 struct dpp *dpp_base, 261 struct dpp *dpp_base, 265 struct dpp *dpp_base, [all …]
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn201/ |
A D | dcn201_dpp.c | 45 struct dpp *dpp_base, in dpp201_cnv_setup() argument 52 struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base); in dpp201_cnv_setup() 170 dpp1_program_input_csc(dpp_base, color_space, select, NULL); in dpp201_cnv_setup() 178 dpp2_power_on_obuf(dpp_base, true); in dpp201_cnv_setup()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/ |
A D | dcn32_hwseq.c | 412 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn32_set_mpc_shaper_3dlut() local 425 &dpp_base->shaper_params, true); in dcn32_set_mpc_shaper_3dlut() 426 shaper_lut = &dpp_base->shaper_params; in dcn32_set_mpc_shaper_3dlut() 461 &dpp_base->regamma_params, false); in dcn32_set_mcm_luts() 462 lut_params = &dpp_base->regamma_params; in dcn32_set_mcm_luts() 476 &dpp_base->shaper_params, true); in dcn32_set_mcm_luts() 477 lut_params = &dpp_base->shaper_params; in dcn32_set_mcm_luts() 513 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn32_set_input_transfer_func() 520 &dpp_base->degamma_params, false)) in dcn32_set_input_transfer_func() 521 params = &dpp_base->degamma_params; in dcn32_set_input_transfer_func() [all …]
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