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Searched refs:dpu_hw_blk (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_rm.h26 struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0];
27 struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
28 struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
31 struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0];
32 struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0];
33 struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0];
89 enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size);
A Ddpu_hw_merge3d.h27 struct dpu_hw_blk base;
43 static inline struct dpu_hw_merge_3d *to_dpu_hw_merge_3d(struct dpu_hw_blk *hw) in to_dpu_hw_merge_3d()
A Ddpu_hw_dspp.h60 struct dpu_hw_blk base;
76 static inline struct dpu_hw_dspp *to_dpu_hw_dspp(struct dpu_hw_blk *hw) in to_dpu_hw_dspp()
A Ddpu_hw_dsc.h52 struct dpu_hw_blk base;
79 static inline struct dpu_hw_dsc *to_dpu_hw_dsc(struct dpu_hw_blk *hw) in to_dpu_hw_dsc()
A Ddpu_hw_lm.h69 struct dpu_hw_blk base;
90 static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw) in to_dpu_hw_mixer()
A Ddpu_hw_pingpong.h145 struct dpu_hw_blk base;
162 static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw) in to_dpu_hw_pingpong()
A Ddpu_hw_ctl.h233 struct dpu_hw_blk base;
255 static inline struct dpu_hw_ctl *to_dpu_hw_ctl(struct dpu_hw_blk *hw) in to_dpu_hw_ctl()
A Ddpu_hw_top.h136 struct dpu_hw_blk base;
A Ddpu_hw_sspp.h360 struct dpu_hw_blk base;
A Ddpu_hw_util.h37 struct dpu_hw_blk { struct
A Ddpu_rm.c623 enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size) in dpu_rm_get_assigned_resources()
625 struct dpu_hw_blk **hw_blks; in dpu_rm_get_assigned_resources()
A Ddpu_encoder.c1024 struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1025 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1026 struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1027 struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL }; in dpu_encoder_virt_atomic_mode_set()
1028 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1986 struct dpu_hw_blk *hw_lm[2]; in dpu_encoder_helper_reset_mixers()

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