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Searched refs:engine_mask (Results 1 – 23 of 23) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dintel_reset.c158 intel_engine_mask_t engine_mask, in i915_do_reset() argument
187 intel_engine_mask_t engine_mask, in g33_do_reset() argument
197 intel_engine_mask_t engine_mask, in g4x_do_reset() argument
316 intel_engine_mask_t engine_mask, in __gen6_reset_engines() argument
322 if (engine_mask == ALL_ENGINES) { in __gen6_reset_engines()
517 intel_engine_mask_t engine_mask, in __gen11_reset_engines() argument
525 if (engine_mask == ALL_ENGINES) { in __gen11_reset_engines()
1278 u32 engine_mask, in intel_gt_reset_global() argument
1348 engine_mask &= gt->info.engine_mask; in intel_gt_handle_error()
1369 engine_mask &= ~engine->mask; in intel_gt_handle_error()
[all …]
A Dintel_reset.h26 intel_engine_mask_t engine_mask,
57 int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
A Dintel_gt_types.h251 intel_engine_mask_t engine_mask; member
295 intel_engine_mask_t engine_mask; member
A Dintel_breadcrumbs_types.h49 intel_engine_mask_t engine_mask; member
A Dintel_engine_cs.c790 gt->info.engine_mask &= ~BIT(_VCS(i)); in engine_mask_apply_media_fuses()
810 gt->info.engine_mask &= ~BIT(_VECS(i)); in engine_mask_apply_media_fuses()
840 info->engine_mask &= ~BIT(_CCS(i)); in engine_mask_apply_compute_fuses()
868 if (mask & info->engine_mask) { in engine_mask_apply_copy_fuses()
872 info->engine_mask &= ~mask; in engine_mask_apply_copy_fuses()
891 GEM_BUG_ON(!info->engine_mask); in init_engine_mask()
912 info->engine_mask &= ~BIT(GSC0); in init_engine_mask()
915 return info->engine_mask; in init_engine_mask()
976 drm_WARN_ON(&i915->drm, engine_mask == 0); in intel_engines_init_mmio()
977 drm_WARN_ON(&i915->drm, engine_mask & in intel_engines_init_mmio()
[all …]
A Dintel_gt.c239 intel_engine_mask_t engine_mask) in intel_gt_clear_error_registers() argument
280 for_each_engine_masked(engine, gt, engine_mask, id) in intel_gt_clear_error_registers()
885 gt->info.engine_mask = RUNTIME_INFO(i915)->platform_engine_mask; in intel_gt_probe_all()
909 gt->info.engine_mask = gtdef->engine_mask; in intel_gt_probe_all()
980 drm_printf(p, "available engines: %x\n", info->engine_mask); in intel_gt_info_print()
A Dintel_gt.h70 intel_engine_mask_t engine_mask);
/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/
A Dscheduler.h150 intel_engine_mask_t engine_mask);
155 intel_engine_mask_t engine_mask,
169 intel_engine_mask_t engine_mask);
A Dvgpu.c435 intel_engine_mask_t engine_mask) in intel_gvt_reset_vgpu_locked() argument
439 intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask; in intel_gvt_reset_vgpu_locked()
443 vgpu->id, dmlr, engine_mask); in intel_gvt_reset_vgpu_locked()
460 if (engine_mask == ALL_ENGINES || dmlr) { in intel_gvt_reset_vgpu_locked()
462 if (engine_mask == ALL_ENGINES) in intel_gvt_reset_vgpu_locked()
A Dexeclist.c523 intel_engine_mask_t engine_mask) in clean_execlist() argument
529 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { in clean_execlist()
537 intel_engine_mask_t engine_mask) in reset_execlist() argument
542 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) in reset_execlist()
547 intel_engine_mask_t engine_mask) in init_execlist() argument
549 reset_execlist(vgpu, engine_mask); in init_execlist()
A Dgvt.h144 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
145 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
146 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
507 intel_engine_mask_t engine_mask);
A Dscheduler.c1048 intel_engine_mask_t engine_mask) in intel_vgpu_clean_workloads() argument
1056 for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) { in intel_vgpu_clean_workloads()
1343 intel_engine_mask_t engine_mask) in intel_vgpu_reset_submission() argument
1350 intel_vgpu_clean_workloads(vgpu, engine_mask); in intel_vgpu_reset_submission()
1351 s->ops->reset(vgpu, engine_mask); in intel_vgpu_reset_submission()
1467 intel_engine_mask_t engine_mask, in intel_vgpu_select_submission_ops() argument
1482 interface == 0 && engine_mask != ALL_ENGINES)) in intel_vgpu_select_submission_ops()
1486 s->ops->clean(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
1496 ret = ops[interface]->init(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
A Dhandlers.c309 intel_engine_mask_t engine_mask = 0; in gdrst_mmio_write() local
317 engine_mask = ALL_ENGINES; in gdrst_mmio_write()
321 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
325 engine_mask |= BIT(VCS0); in gdrst_mmio_write()
329 engine_mask |= BIT(BCS0); in gdrst_mmio_write()
333 engine_mask |= BIT(VECS0); in gdrst_mmio_write()
337 engine_mask |= BIT(VCS1); in gdrst_mmio_write()
343 engine_mask &= vgpu->gvt->gt->info.engine_mask; in gdrst_mmio_write()
347 intel_gvt_reset_vgpu_locked(vgpu, false, engine_mask); in gdrst_mmio_write()
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/uc/
A Dintel_gsc_uc.c33 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); in gsc_engine_supported()
38 mask = gt->info.engine_mask; in gsc_engine_supported()
A Dintel_huc.c240 intel_engine_mask_t mask = gt->info.engine_mask; in vcs_supported()
251 GEM_BUG_ON(!gt_is_root(gt) && !gt->info.engine_mask); in vcs_supported()
256 mask = gt->info.engine_mask; in vcs_supported()
A Dintel_guc_submission.c3939 intel_engine_mask_t tmp, mask = b->engine_mask; in guc_irq_enable_breadcrumbs()
3952 intel_engine_mask_t tmp, mask = b->engine_mask; in guc_irq_disable_breadcrumbs()
3985 engine->breadcrumbs->engine_mask |= engine->mask; in guc_init_breadcrumbs()
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_gpu_error.h271 intel_engine_mask_t engine_mask, u32 dump_flags);
273 intel_engine_mask_t engine_mask, u32 dump_flags);
332 i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_capture_error_state() argument
A Di915_drv.h392 for ((tmp__) = (mask__) & (gt__)->info.engine_mask; \
738 #define __HAS_ENGINE(engine_mask, id) ((engine_mask) & BIT(id)) argument
739 #define HAS_ENGINE(gt, id) __HAS_ENGINE((gt)->info.engine_mask, id)
748 __ENGINE_INSTANCES_MASK((gt)->info.engine_mask, first, count)
A Di915_gpu_error.c1653 intel_engine_mask_t engine_mask, in gt_record_engines() argument
1670 ee->hung = engine->mask & engine_mask; in gt_record_engines()
2064 __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in __i915_gpu_coredump() argument
2100 gt_record_engines(error->gt, engine_mask, compress, dump_flags); in __i915_gpu_coredump()
2114 i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) in i915_gpu_coredump() argument
2123 dump = __i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_gpu_coredump()
2170 intel_engine_mask_t engine_mask, u32 dump_flags) in i915_capture_error_state() argument
2174 error = i915_gpu_coredump(gt, engine_mask, dump_flags); in i915_capture_error_state()
A Di915_pci.c1130 .engine_mask = BIT(VECS0) | BIT(VCS0) | BIT(VCS2) | BIT(GSC0),
A Dintel_uncore.c2298 emask = uncore->gt->info.engine_mask; in intel_uncore_fw_domains_init()
/linux-6.3-rc2/drivers/net/wireless/mediatek/mt76/
A Dmt76x02_dfs.c617 u32 engine_mask; in mt76x02_dfs_tasklet() local
641 engine_mask = mt76_rr(dev, MT_BBP(DFS, 1)); in mt76x02_dfs_tasklet()
642 if (!(engine_mask & 0xf)) in mt76x02_dfs_tasklet()
648 if (!(engine_mask & (1 << i))) in mt76x02_dfs_tasklet()
/linux-6.3-rc2/drivers/gpu/drm/i915/selftests/
A Dmock_gem_device.c213 to_gt(i915)->info.engine_mask = BIT(0); in mock_gem_device()

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