Searched refs:fw_based_mclk_switching (Results 1 – 7 of 7) sorted by relevance
974 dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) && in dcn30_hardware_release()1003 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching, context); in dcn30_prepare_bandwidth()
1962 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_calculate_wm_and_dlg_fpu()1966 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = in dcn32_calculate_wm_and_dlg_fpu()1969 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn32_calculate_wm_and_dlg_fpu()2076 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn32_calculate_wm_and_dlg_fpu()2095 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && !subvp_in_use) { in dcn32_calculate_wm_and_dlg_fpu()2191 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn32_calculate_wm_and_dlg_fpu()
542 bool fw_based_mclk_switching; member
961 fams_enable = stream->ctx->dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; in mod_freesync_build_vrr_infopacket()
530 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) in dcn30_fpu_calculate_wm_and_dlg()
1845 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_validate_bandwidth()
1069 …xt->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; in dcn20_calculate_dlg_params()
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