1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright 2022, Athira Rajeev, IBM Corp.
4  * Copyright 2022, Madhavan Srinivasan, IBM Corp.
5  * Copyright 2022, Kajol Jain, IBM Corp.
6  */
7 
8 #include <sys/stat.h>
9 #include "../event.h"
10 
11 #define POWER10 0x80
12 #define POWER9  0x4e
13 #define PERF_POWER9_MASK        0x7f8ffffffffffff
14 #define PERF_POWER10_MASK       0x7ffffffffffffff
15 
16 #define MMCR0_FC56      0x00000010UL /* freeze counters 5 and 6 */
17 #define MMCR0_PMCCEXT   0x00000200UL /* PMCCEXT control */
18 #define MMCR1_RSQ       0x200000000000ULL /* radix scope qual field */
19 #define BHRB_DISABLE    0x2000000000ULL /* MMCRA BHRB DISABLE bit */
20 
21 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
22 
23 extern int ev_mask_pmcxsel, ev_shift_pmcxsel;
24 extern int ev_mask_marked, ev_shift_marked;
25 extern int ev_mask_comb, ev_shift_comb;
26 extern int ev_mask_unit, ev_shift_unit;
27 extern int ev_mask_pmc, ev_shift_pmc;
28 extern int ev_mask_cache, ev_shift_cache;
29 extern int ev_mask_sample, ev_shift_sample;
30 extern int ev_mask_thd_sel, ev_shift_thd_sel;
31 extern int ev_mask_thd_start, ev_shift_thd_start;
32 extern int ev_mask_thd_stop, ev_shift_thd_stop;
33 extern int ev_mask_thd_cmp, ev_shift_thd_cmp;
34 extern int ev_mask_sm, ev_shift_sm;
35 extern int ev_mask_rsq, ev_shift_rsq;
36 extern int ev_mask_l2l3, ev_shift_l2l3;
37 extern int ev_mask_mmcr3_src, ev_shift_mmcr3_src;
38 extern int pvr;
39 extern u64 platform_extended_mask;
40 extern int check_pvr_for_sampling_tests(void);
41 extern int platform_check_for_tests(void);
42 
43 /*
44  * Event code field extraction macro.
45  * Raw event code is combination of multiple
46  * fields. Macro to extract individual fields
47  *
48  * x - Raw event code value
49  * y - Field to extract
50  */
51 #define EV_CODE_EXTRACT(x, y)   \
52 	((x >> ev_shift_##y) & ev_mask_##y)
53 
54 void *event_sample_buf_mmap(int fd, int mmap_pages);
55 void *__event_read_samples(void *sample_buff, size_t *size, u64 *sample_count);
56 int collect_samples(void *sample_buff);
57 u64 *get_intr_regs(struct event *event, void *sample_buff);
58 u64 get_reg_value(u64 *intr_regs, char *register_name);
59 int get_thresh_cmp_val(struct event event);
60 bool check_for_generic_compat_pmu(void);
61 bool check_for_compat_mode(void);
62 
get_mmcr0_fc56(u64 mmcr0,int pmc)63 static inline int get_mmcr0_fc56(u64 mmcr0, int pmc)
64 {
65 	return (mmcr0 & MMCR0_FC56);
66 }
67 
get_mmcr0_pmccext(u64 mmcr0,int pmc)68 static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc)
69 {
70 	return (mmcr0 & MMCR0_PMCCEXT);
71 }
72 
get_mmcr0_pmao(u64 mmcr0,int pmc)73 static inline int get_mmcr0_pmao(u64 mmcr0, int pmc)
74 {
75 	return ((mmcr0 >> 7) & 0x1);
76 }
77 
get_mmcr0_cc56run(u64 mmcr0,int pmc)78 static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc)
79 {
80 	return ((mmcr0 >> 8) & 0x1);
81 }
82 
get_mmcr0_pmcjce(u64 mmcr0,int pmc)83 static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc)
84 {
85 	return ((mmcr0 >> 14) & 0x1);
86 }
87 
get_mmcr0_pmc1ce(u64 mmcr0,int pmc)88 static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc)
89 {
90 	return ((mmcr0 >> 15) & 0x1);
91 }
92 
get_mmcr0_pmae(u64 mmcr0,int pmc)93 static inline int get_mmcr0_pmae(u64 mmcr0, int pmc)
94 {
95 	return ((mmcr0 >> 27) & 0x1);
96 }
97 
get_mmcr1_pmcxsel(u64 mmcr1,int pmc)98 static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc)
99 {
100 	return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff));
101 }
102 
get_mmcr1_unit(u64 mmcr1,int pmc)103 static inline int get_mmcr1_unit(u64 mmcr1, int pmc)
104 {
105 	return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf);
106 }
107 
get_mmcr1_comb(u64 mmcr1,int pmc)108 static inline int get_mmcr1_comb(u64 mmcr1, int pmc)
109 {
110 	return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3);
111 }
112 
get_mmcr1_cache(u64 mmcr1,int pmc)113 static inline int get_mmcr1_cache(u64 mmcr1, int pmc)
114 {
115 	return ((mmcr1 >> 46) & 0x3);
116 }
117 
get_mmcr1_rsq(u64 mmcr1,int pmc)118 static inline int get_mmcr1_rsq(u64 mmcr1, int pmc)
119 {
120 	return mmcr1 & MMCR1_RSQ;
121 }
122 
get_mmcr2_fcs(u64 mmcr2,int pmc)123 static inline int get_mmcr2_fcs(u64 mmcr2, int pmc)
124 {
125 	return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9)));
126 }
127 
get_mmcr2_fcp(u64 mmcr2,int pmc)128 static inline int get_mmcr2_fcp(u64 mmcr2, int pmc)
129 {
130 	return ((mmcr2 & (1ull << (62 - (((pmc) - 1) * 9)))) >> (62 - (((pmc) - 1) * 9)));
131 }
132 
get_mmcr2_fcpc(u64 mmcr2,int pmc)133 static inline int get_mmcr2_fcpc(u64 mmcr2, int pmc)
134 {
135 	return ((mmcr2 & (1ull << (61 - (((pmc) - 1) * 9)))) >> (61 - (((pmc) - 1) * 9)));
136 }
137 
get_mmcr2_fcm1(u64 mmcr2,int pmc)138 static inline int get_mmcr2_fcm1(u64 mmcr2, int pmc)
139 {
140 	return ((mmcr2 & (1ull << (60 - (((pmc) - 1) * 9)))) >> (60 - (((pmc) - 1) * 9)));
141 }
142 
get_mmcr2_fcm0(u64 mmcr2,int pmc)143 static inline int get_mmcr2_fcm0(u64 mmcr2, int pmc)
144 {
145 	return ((mmcr2 & (1ull << (59 - (((pmc) - 1) * 9)))) >> (59 - (((pmc) - 1) * 9)));
146 }
147 
get_mmcr2_fcwait(u64 mmcr2,int pmc)148 static inline int get_mmcr2_fcwait(u64 mmcr2, int pmc)
149 {
150 	return ((mmcr2 & (1ull << (58 - (((pmc) - 1) * 9)))) >> (58 - (((pmc) - 1) * 9)));
151 }
152 
get_mmcr2_fch(u64 mmcr2,int pmc)153 static inline int get_mmcr2_fch(u64 mmcr2, int pmc)
154 {
155 	return ((mmcr2 & (1ull << (57 - (((pmc) - 1) * 9)))) >> (57 - (((pmc) - 1) * 9)));
156 }
157 
get_mmcr2_fcti(u64 mmcr2,int pmc)158 static inline int get_mmcr2_fcti(u64 mmcr2, int pmc)
159 {
160 	return ((mmcr2 & (1ull << (56 - (((pmc) - 1) * 9)))) >> (56 - (((pmc) - 1) * 9)));
161 }
162 
get_mmcr2_fcta(u64 mmcr2,int pmc)163 static inline int get_mmcr2_fcta(u64 mmcr2, int pmc)
164 {
165 	return ((mmcr2 & (1ull << (55 - (((pmc) - 1) * 9)))) >> (55 - (((pmc) - 1) * 9)));
166 }
167 
get_mmcr2_l2l3(u64 mmcr2,int pmc)168 static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc)
169 {
170 	if (pvr == POWER10)
171 		return ((mmcr2 & 0xf8) >> 3);
172 	return 0;
173 }
174 
get_mmcr3_src(u64 mmcr3,int pmc)175 static inline int get_mmcr3_src(u64 mmcr3, int pmc)
176 {
177 	if (pvr != POWER10)
178 		return 0;
179 	return ((mmcr3 >> ((49 - (15 * ((pmc) - 1))))) & 0x7fff);
180 }
181 
get_mmcra_thd_cmp(u64 mmcra,int pmc)182 static inline int get_mmcra_thd_cmp(u64 mmcra, int pmc)
183 {
184 	if (pvr == POWER10)
185 		return ((mmcra >> 45) & 0x7ff);
186 	return ((mmcra >> 45) & 0x3ff);
187 }
188 
get_mmcra_sm(u64 mmcra,int pmc)189 static inline int get_mmcra_sm(u64 mmcra, int pmc)
190 {
191 	return ((mmcra >> 42) & 0x3);
192 }
193 
get_mmcra_bhrb_disable(u64 mmcra,int pmc)194 static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc)
195 {
196 	if (pvr == POWER10)
197 		return mmcra & BHRB_DISABLE;
198 	return 0;
199 }
200 
get_mmcra_ifm(u64 mmcra,int pmc)201 static inline int get_mmcra_ifm(u64 mmcra, int pmc)
202 {
203 	return ((mmcra >> 30) & 0x3);
204 }
205 
get_mmcra_thd_sel(u64 mmcra,int pmc)206 static inline int get_mmcra_thd_sel(u64 mmcra, int pmc)
207 {
208 	return ((mmcra >> 16) & 0x7);
209 }
210 
get_mmcra_thd_start(u64 mmcra,int pmc)211 static inline int get_mmcra_thd_start(u64 mmcra, int pmc)
212 {
213 	return ((mmcra >> 12) & 0xf);
214 }
215 
get_mmcra_thd_stop(u64 mmcra,int pmc)216 static inline int get_mmcra_thd_stop(u64 mmcra, int pmc)
217 {
218 	return ((mmcra >> 8) & 0xf);
219 }
220 
get_mmcra_rand_samp_elig(u64 mmcra,int pmc)221 static inline int get_mmcra_rand_samp_elig(u64 mmcra, int pmc)
222 {
223 	return ((mmcra >> 4) & 0x7);
224 }
225 
get_mmcra_sample_mode(u64 mmcra,int pmc)226 static inline int get_mmcra_sample_mode(u64 mmcra, int pmc)
227 {
228 	return ((mmcra >> 1) & 0x3);
229 }
230 
get_mmcra_marked(u64 mmcra,int pmc)231 static inline int get_mmcra_marked(u64 mmcra, int pmc)
232 {
233 	return mmcra & 0x1;
234 }
235