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Searched refs:gfx (Results 1 – 25 of 141) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_rlc.c39 if (adev->gfx.rlc.in_safe_mode) in amdgpu_gfx_rlc_enter_safe_mode()
109 dst_ptr = adev->gfx.rlc.sr_ptr; in amdgpu_gfx_rlc_init_sr()
132 adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev); in amdgpu_gfx_rlc_init_csb()
204 (adev->gfx.ce_fw->data + in amdgpu_gfx_rlc_setup_cp_table()
212 (adev->gfx.pfp_fw->data + in amdgpu_gfx_rlc_setup_cp_table()
220 (adev->gfx.me_fw->data + in amdgpu_gfx_rlc_setup_cp_table()
228 (adev->gfx.mec_fw->data + in amdgpu_gfx_rlc_setup_cp_table()
236 (adev->gfx.mec2_fw->data + in amdgpu_gfx_rlc_setup_cp_table()
322 adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; in amdgpu_gfx_rlc_init_microcode_v2_0()
332 info->fw = adev->gfx.rlc_fw; in amdgpu_gfx_rlc_init_microcode_v2_0()
[all …]
A Damdgpu_gfx.c256 adev->gfx.num_gfx_rings = in amdgpu_gfx_graphics_queue_acquire()
710 if (!adev->gfx.ras) in amdgpu_gfx_ras_sw_init()
713 ras = adev->gfx.ras; in amdgpu_gfx_ras_sw_init()
740 if (adev->gfx.ras && adev->gfx.ras->poison_consumption_handler) in amdgpu_gfx_poison_consumption_handler()
758 if (adev->gfx.ras && adev->gfx.ras->ras_block.hw_ops && in amdgpu_gfx_process_ras_data_cb()
936 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
946 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
963 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
973 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
984 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
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A Dgfx_v7_0.c2391 if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) in gfx_v7_0_cp_gfx_load_microcode()
2412 (adev->gfx.pfp_fw->data + in gfx_v7_0_cp_gfx_load_microcode()
2422 (adev->gfx.ce_fw->data + in gfx_v7_0_cp_gfx_load_microcode()
2432 (adev->gfx.me_fw->data + in gfx_v7_0_cp_gfx_load_microcode()
2654 if (!adev->gfx.mec_fw) in gfx_v7_0_cp_compute_load_microcode()
2667 (adev->gfx.mec_fw->data + in gfx_v7_0_cp_compute_load_microcode()
2678 if (!adev->gfx.mec2_fw) in gfx_v7_0_cp_compute_load_microcode()
2737 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
3454 if (!adev->gfx.rlc_fw) in gfx_v7_0_rlc_resume()
4297 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v7_0_gpu_early_init()
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A Dgfx_v6_0.c388 memset(adev->gfx.config.tile_mode_array, 0, sizeof(adev->gfx.config.tile_mode_array)); in gfx_v6_0_tiling_mode_table_init()
1670 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v6_0_constants_init()
1677 adev->gfx.config.num_gpus = 1; in gfx_v6_0_constants_init()
1937 if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) in gfx_v6_0_cp_gfx_load_microcode()
2067 ring = &adev->gfx.gfx_ring[0]; in gfx_v6_0_cp_gfx_resume()
2343 adev->gfx.rlc.reg_list_size = in gfx_v6_0_rlc_init()
2489 if (!adev->gfx.rlc_fw) in gfx_v6_0_rlc_resume()
3073 ring = &adev->gfx.gfx_ring[i]; in gfx_v6_0_sw_init()
3077 &adev->gfx.eop_irq, in gfx_v6_0_sw_init()
3140 adev->gfx.ce_ram_size = 0x8000; in gfx_v6_0_hw_init()
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A Dgfx_v11_0.c1058 adev->gfx.me_fw->data; in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()
1106 adev->gfx.me_fw->data; in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()
1391 kiq = &adev->gfx.kiq; in gfx_v11_0_sw_init()
1714 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v11_0_init_csb()
1904 if (!adev->gfx.rlc_fw) in gfx_v11_0_rlc_load_microcode()
2227 adev->gfx.me_fw->data; in gfx_v11_0_config_me_cache_rs64()
2435 adev->gfx.me_fw->data; in gfx_v11_0_config_gfx_rs64()
3047 if (!adev->gfx.me_fw || !adev->gfx.pfp_fw) in gfx_v11_0_cp_gfx_load_microcode()
3346 if (!adev->gfx.mec_fw) in gfx_v11_0_cp_compute_load_microcode()
3398 if (!adev->gfx.mec_fw) in gfx_v11_0_cp_compute_load_microcode_rs64()
[all …]
A Dgfx_v8_0.c1088 adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; in gfx_v8_0_init_microcode()
1127 adev->gfx.mec2_fw->data; in gfx_v8_0_init_microcode()
1134 adev->gfx.mec2_fw = NULL; in gfx_v8_0_init_microcode()
1147 info->fw = adev->gfx.me_fw; in gfx_v8_0_init_microcode()
1154 info->fw = adev->gfx.ce_fw; in gfx_v8_0_init_microcode()
1186 if (adev->gfx.mec2_fw) { in gfx_v8_0_init_microcode()
1803 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v8_0_gpu_early_init()
1915 adev->gfx.mec.num_mec = 2; in gfx_v8_0_sw_init()
1920 adev->gfx.mec.num_mec = 1; in gfx_v8_0_sw_init()
2024 kiq = &adev->gfx.kiq; in gfx_v8_0_sw_init()
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A Dgfx_v9_0.c1368 adev->gfx.mec2_fw_version = adev->gfx.mec_fw_version; in gfx_v9_0_init_cp_compute_microcode()
1369 adev->gfx.mec2_feature_version = adev->gfx.mec_feature_version; in gfx_v9_0_init_cp_compute_microcode()
2123 r = amdgpu_ring_mux_init(&adev->gfx.muxer, &adev->gfx.gfx_ring[0], in gfx_v9_0_sw_init()
2164 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init()
2472 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v9_0_init_csb()
2873 if (!adev->gfx.rlc_fw) in gfx_v9_0_rlc_load_microcode()
2957 if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) in gfx_v9_0_cp_gfx_load_microcode()
2963 adev->gfx.ce_fw->data; in gfx_v9_0_cp_gfx_load_microcode()
3157 if (!adev->gfx.mec_fw) in gfx_v9_0_cp_compute_load_microcode()
4544 if (adev->gfx.ras && in gfx_v9_0_ecc_late_init()
[all …]
A Damdgpu_atomfirmware.c756 adev->gfx.config.max_cu_per_sh = gfx_info->v24.max_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
757 adev->gfx.config.max_sh_per_se = gfx_info->v24.max_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
760 adev->gfx.config.max_gprs = le16_to_cpu(gfx_info->v24.gc_num_gprs); in amdgpu_atomfirmware_get_gfx_info()
761 adev->gfx.config.max_gs_threads = gfx_info->v24.gc_num_max_gs_thds; in amdgpu_atomfirmware_get_gfx_info()
763 adev->gfx.config.gs_prim_buffer_depth = in amdgpu_atomfirmware_get_gfx_info()
765 adev->gfx.config.double_offchip_lds_buf = in amdgpu_atomfirmware_get_gfx_info()
774 adev->gfx.config.max_cu_per_sh = gfx_info->v27.max_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
775 adev->gfx.config.max_sh_per_se = gfx_info->v27.max_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
778 adev->gfx.config.max_gprs = le16_to_cpu(gfx_info->v27.gc_num_gprs); in amdgpu_atomfirmware_get_gfx_info()
795 adev->gfx.config.max_cu_per_sh = gfx_info->v30.max_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
[all …]
A Damdgpu_kms.c225 fw_info->ver = adev->gfx.me_fw_version; in amdgpu_firmware_info()
229 fw_info->ver = adev->gfx.pfp_fw_version; in amdgpu_firmware_info()
233 fw_info->ver = adev->gfx.ce_fw_version; in amdgpu_firmware_info()
237 fw_info->ver = adev->gfx.rlc_fw_version; in amdgpu_firmware_info()
262 fw_info->ver = adev->gfx.mec_fw_version; in amdgpu_firmware_info()
265 fw_info->ver = adev->gfx.mec2_fw_version; in amdgpu_firmware_info()
352 fw_info->ver = adev->gfx.imu_fw_version; in amdgpu_firmware_info()
378 if (adev->gfx.gfx_ring[i].sched.ready) in amdgpu_hw_ip_info()
802 adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
875 adev->gfx.config.gc_gl1c_per_sa; in amdgpu_info_ioctl()
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A Dgfx_v10_0.c4636 kiq = &adev->gfx.kiq; in gfx_v10_0_sw_init()
4801 num_sc = adev->gfx.config.max_shader_engines * adev->gfx.config.max_sh_per_se * in gfx_v10_0_init_pa_sc_tile_steering_override()
5024 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v10_0_init_csb()
5109 if (!adev->gfx.rlc_fw) in gfx_v10_0_rlc_load_microcode()
5330 adev->gfx.pfp_fw->data; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
5340 adev->gfx.ce_fw->data; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
5350 adev->gfx.me_fw->data; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
5758 adev->gfx.ce_fw->data; in gfx_v10_0_cp_gfx_load_ce_microcode()
5835 adev->gfx.me_fw->data; in gfx_v10_0_cp_gfx_load_me_microcode()
5906 if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) in gfx_v10_0_cp_gfx_load_microcode()
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A Damdgpu_amdkfd.c165 adev->gfx.mec.queue_bitmap, in amdgpu_amdkfd_device_init()
172 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
173 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
399 return adev->gfx.pfp_fw_version; in amdgpu_amdkfd_get_fw_version()
402 return adev->gfx.me_fw_version; in amdgpu_amdkfd_get_fw_version()
405 return adev->gfx.ce_fw_version; in amdgpu_amdkfd_get_fw_version()
408 return adev->gfx.mec_fw_version; in amdgpu_amdkfd_get_fw_version()
411 return adev->gfx.mec2_fw_version; in amdgpu_amdkfd_get_fw_version()
414 return adev->gfx.rlc_fw_version; in amdgpu_amdkfd_get_fw_version()
662 ring = &adev->gfx.compute_ring[0]; in amdgpu_amdkfd_submit_ib()
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A Damdgpu_ucode.c802 ucode_addr = adev->gfx.rlc.save_restore_list_cntl; in amdgpu_ucode_init_single_fw()
806 ucode_addr = adev->gfx.rlc.save_restore_list_gpm; in amdgpu_ucode_init_single_fw()
810 ucode_addr = adev->gfx.rlc.save_restore_list_srm; in amdgpu_ucode_init_single_fw()
814 ucode_addr = adev->gfx.rlc.rlc_iram_ucode; in amdgpu_ucode_init_single_fw()
818 ucode_addr = adev->gfx.rlc.rlc_dram_ucode; in amdgpu_ucode_init_single_fw()
822 ucode_addr = adev->gfx.rlc.rlcp_ucode; in amdgpu_ucode_init_single_fw()
826 ucode_addr = adev->gfx.rlc.rlcv_ucode; in amdgpu_ucode_init_single_fw()
834 ucode_addr = adev->gfx.rlc.se0_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
838 ucode_addr = adev->gfx.rlc.se1_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
842 ucode_addr = adev->gfx.rlc.se2_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
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A Damdgpu_amdkfd_gfx_v9.c164 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
165 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
303 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load()
313 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_hiq_mqd_load()
318 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
345 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
783 max_queue_cnt = adev->gfx.mec.num_pipe_per_mec * in kgd_gfx_v9_get_cu_occupancy()
784 adev->gfx.mec.num_queue_per_pipe; in kgd_gfx_v9_get_cu_occupancy()
785 sh_cnt = adev->gfx.config.max_sh_per_se; in kgd_gfx_v9_get_cu_occupancy()
786 se_cnt = adev->gfx.config.max_shader_engines; in kgd_gfx_v9_get_cu_occupancy()
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A Dimu_v11_0.c53 err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, fw_name); in imu_v11_0_init_microcode()
57 adev->gfx.imu_fw_version = le32_to_cpu(imu_hdr->header.ucode_version); in imu_v11_0_init_microcode()
63 info->fw = adev->gfx.imu_fw; in imu_v11_0_init_microcode()
68 info->fw = adev->gfx.imu_fw; in imu_v11_0_init_microcode()
78 amdgpu_ucode_release(&adev->gfx.imu_fw); in imu_v11_0_init_microcode()
90 if (!adev->gfx.imu_fw) in imu_v11_0_load_microcode()
96 fw_data = (const __le32 *)(adev->gfx.imu_fw->data + in imu_v11_0_load_microcode()
105 WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, adev->gfx.imu_fw_version); in imu_v11_0_load_microcode()
107 fw_data = (const __le32 *)(adev->gfx.imu_fw->data + in imu_v11_0_load_microcode()
117 WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version); in imu_v11_0_load_microcode()
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A Damdgpu_debugfs.c718 config[no_regs++] = adev->gfx.config.max_tile_pipes; in amdgpu_debugfs_gca_config_read()
719 config[no_regs++] = adev->gfx.config.max_cu_per_sh; in amdgpu_debugfs_gca_config_read()
720 config[no_regs++] = adev->gfx.config.max_sh_per_se; in amdgpu_debugfs_gca_config_read()
723 config[no_regs++] = adev->gfx.config.max_gprs; in amdgpu_debugfs_gca_config_read()
735 config[no_regs++] = adev->gfx.config.num_gpus; in amdgpu_debugfs_gca_config_read()
737 config[no_regs++] = adev->gfx.config.mc_arb_ramcfg; in amdgpu_debugfs_gca_config_read()
739 config[no_regs++] = adev->gfx.config.num_rbs; in amdgpu_debugfs_gca_config_read()
913 if (adev->gfx.funcs->read_wave_data) in amdgpu_debugfs_wave_read()
1007 if (adev->gfx.funcs->read_wave_vgprs) in amdgpu_debugfs_gpr_read()
1010 if (adev->gfx.funcs->read_wave_sgprs) in amdgpu_debugfs_gpr_read()
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A Damdgpu_discovery.c1323 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1326 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1329 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1334 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1337 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1344 adev->gfx.config.gc_num_tcps = le32_to_cpu(gc_info->v1_1.gc_num_tcps); in amdgpu_discovery_get_gfx_info()
1358 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
1359 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); in amdgpu_discovery_get_gfx_info()
1363 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1368 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
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A Damdgpu_amdkfd_gfx_v11.c57 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
58 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
109 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
110 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v11()
180 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v11()
181 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v11()
263 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v11()
272 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v11()
273 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v11()
278 spin_lock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v11()
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A Damdgpu_amdkfd_gfx_v10.c58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
59 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
67 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
143 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
144 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
291 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_hiq_mqd_load()
300 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load()
301 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hiq_mqd_load()
306 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load()
333 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load()
A Damdgpu_amdkfd_gfx_v10_3.c59 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
60 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
113 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
114 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v10_3()
195 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3()
196 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v10_3()
278 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v10_3()
287 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3()
288 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v10_3()
293 spin_lock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v10_3()
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A Damdgpu_cgs.c173 fw_version = adev->gfx.ce_fw_version; in amdgpu_get_firmware_version()
176 fw_version = adev->gfx.pfp_fw_version; in amdgpu_get_firmware_version()
179 fw_version = adev->gfx.me_fw_version; in amdgpu_get_firmware_version()
182 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
185 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
188 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
191 fw_version = adev->gfx.rlc_fw_version; in amdgpu_get_firmware_version()
A Dgfx_v9_4_2.c502 !adev->gfx.compute_ring[1].sched.ready) in gfx_v9_4_2_do_sgprs_init()
516 &adev->gfx.compute_ring[0], in gfx_v9_4_2_do_sgprs_init()
522 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
541 &adev->gfx.compute_ring[1], in gfx_v9_4_2_do_sgprs_init()
547 adev->gfx.cu_info.number * 2, in gfx_v9_4_2_do_sgprs_init()
581 &adev->gfx.compute_ring[0], in gfx_v9_4_2_do_sgprs_init()
587 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
645 if (!adev->gfx.compute_ring[0].sched.ready) in gfx_v9_4_2_do_vgprs_init()
659 &adev->gfx.compute_ring[0], in gfx_v9_4_2_do_vgprs_init()
665 adev->gfx.cu_info.number, in gfx_v9_4_2_do_vgprs_init()
[all …]
/linux-6.3-rc2/Documentation/ABI/testing/
A Dsysfs-driver-intel-i915-hwmon4 Contact: intel-gfx@lists.freedesktop.org
12 Contact: intel-gfx@lists.freedesktop.org
24 Contact: intel-gfx@lists.freedesktop.org
32 Contact: intel-gfx@lists.freedesktop.org
41 Contact: intel-gfx@lists.freedesktop.org
54 Contact: intel-gfx@lists.freedesktop.org
67 Contact: intel-gfx@lists.freedesktop.org
/linux-6.3-rc2/Documentation/devicetree/bindings/gpu/
A Daspeed-gfx.txt6 + aspeed,ast2500-gfx
7 + aspeed,ast2400-gfx
26 gfx: display@1e6e6000 {
27 compatible = "aspeed,ast2500-gfx", "syscon";
/linux-6.3-rc2/drivers/soc/qcom/
A Drpmhpd.c230 [SA8775P_GFX] = &gfx,
252 [SDM670_GFX] = &gfx,
270 [SDM845_GFX] = &gfx,
313 [SM6350_GFX] = &gfx,
330 [SM8150_GFX] = &gfx,
350 [SM8250_GFX] = &gfx,
369 [SM8350_GFX] = &gfx,
391 [SM8450_GFX] = &gfx,
413 [SM8550_GFX] = &gfx,
448 [SC7180_GFX] = &gfx,
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/mfd/
A Daspeed-gfx.txt8 - compatible: "aspeed,ast2500-gfx", "syscon"
14 gfx: display@1e6e6000 {
15 compatible = "aspeed,ast2500-gfx", "syscon";

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