Searched refs:gfx_table (Results 1 – 18 of 18) sorted by relevance
331 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()509 struct smu_13_0_dpm_table *gfx_table = in aldebaran_populate_umd_state_clk() local510 &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk()518 pstate_table->gfxclk_pstate.min = gfx_table->min; in aldebaran_populate_umd_state_clk()519 pstate_table->gfxclk_pstate.peak = gfx_table->max; in aldebaran_populate_umd_state_clk()1276 struct smu_13_0_dpm_table *gfx_table = in aldebaran_set_performance_level() local1277 &dpm_context->dpm_tables.gfx_table; in aldebaran_set_performance_level()1348 (max > dpm_context->dpm_tables.gfx_table.max)) { in aldebaran_set_soft_freq_limited_range()1355 min_clk = dpm_context->dpm_tables.gfx_table.min; in aldebaran_set_soft_freq_limited_range()1356 max_clk = dpm_context->dpm_tables.gfx_table.max; in aldebaran_set_soft_freq_limited_range()[all …]
61 struct aldebaran_single_dpm_table gfx_table; member
563 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_set_default_dpm_table()867 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_get_dpm_ultimate_freq()1047 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_print_clk_levels()1176 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_force_clk_levels()1391 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_0_populate_umd_state_clk() local1392 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_populate_umd_state_clk()1410 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_0_populate_umd_state_clk()1412 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v13_0_0_populate_umd_state_clk()1415 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_0_populate_umd_state_clk()1433 driver_clocks.BaseClockAc < gfx_table->max) in smu_v13_0_0_populate_umd_state_clk()[all …]
571 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_set_default_dpm_table()977 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_print_clk_levels()1106 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_force_clk_levels()1318 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_7_populate_umd_state_clk() local1319 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_populate_umd_state_clk()1333 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_7_populate_umd_state_clk()1334 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_7_populate_umd_state_clk()1355 pstate_table->gfxclk_pstate.standard = gfx_table->min; in smu_v13_0_7_populate_umd_state_clk()
1723 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_set_performance_level() local1724 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_set_performance_level()1748 sclk_min = sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()1756 sclk_min = sclk_max = gfx_table->min; in smu_v13_0_set_performance_level()1764 sclk_min = gfx_table->min; in smu_v13_0_set_performance_level()1765 sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
589 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()655 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1470 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1472 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1489 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1560 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1572 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()2381 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_highest()2423 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_lowest()2562 data->dpm_table.gfx_table.count - 1); in vega20_force_clock_level()[all …]
657 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()1653 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1654 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1682 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()1683 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_lowest()1856 dpm_table = &(data->dpm_table.gfx_table); in vega12_get_sclks()2027 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_clock_level()2362 dpm_table = &(data->dpm_table.gfx_table); in vega12_apply_clocks_adjust_rules()2663 for (i = 0; i < dpm_table->gfx_table.count; i++) {2664 if (dpm_table->gfx_table.dpm_levels[i].enabled &&[all …]
1350 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()3556 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3626 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3632 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3684 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3689 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()5109 &(data->golden_dpm_table.gfx_table); in vega10_get_sclk_od()5124 &(data->golden_dpm_table.gfx_table); in vega10_set_sclk_od()5375 golden_table = &(data->golden_dpm_table.gfx_table); in vega10_check_clk_voltage_valid()5405 &data->dpm_table.gfx_table; in vega10_odn_update_power_state()[all …]
148 struct vega10_single_dpm_table gfx_table; member
127 struct vega12_single_dpm_table gfx_table; member
179 struct vega20_single_dpm_table gfx_table; member
61 struct arcturus_single_dpm_table gfx_table; member
353 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()533 struct smu_11_0_dpm_table *gfx_table = in arcturus_populate_umd_state_clk() local534 &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk()542 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()543 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()551 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()555 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()788 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_print_clk_levels()959 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()1029 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
1841 struct smu_11_0_dpm_table *gfx_table = in smu_v11_0_set_performance_level() local1842 &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level()1857 sclk_min = sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()1862 sclk_min = sclk_max = gfx_table->min; in smu_v11_0_set_performance_level()1867 sclk_min = gfx_table->min; in smu_v11_0_set_performance_level()1868 sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
994 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()1702 struct smu_11_0_dpm_table *gfx_table = in navi10_populate_umd_state_clk() local1703 &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk()1713 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()1757 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()1768 if (gfx_table->max > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
952 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()1468 struct smu_11_0_dpm_table *gfx_table = in sienna_cichlid_populate_umd_state_clk() local1469 &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk()1478 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()1479 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
95 struct smu_13_0_dpm_table gfx_table; member
105 struct smu_11_0_dpm_table gfx_table; member
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