Searched refs:global_ctrl (Results 1 – 7 of 7) sorted by relevance
235 u32 global_ctrl; in disable_hdm() local239 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in disable_hdm()240 writel(global_ctrl & ~CXL_HDM_DECODER_ENABLE, in disable_hdm()247 u32 global_ctrl; in devm_cxl_enable_hdm() local249 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in devm_cxl_enable_hdm()250 writel(global_ctrl | CXL_HDM_DECODER_ENABLE, in devm_cxl_enable_hdm()375 u32 global_ctrl = 0; in cxl_hdm_decode_init() local378 global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); in cxl_hdm_decode_init()384 if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled)) in cxl_hdm_decode_init()
118 return test_bit(pmc->idx, (unsigned long *)&pmu->global_ctrl); in intel_pmc_is_enabled()359 msr_info->data = pmu->global_ctrl; in intel_pmu_get_msr()419 if (pmu->global_ctrl == data) in intel_pmu_set_msr()422 diff = pmu->global_ctrl ^ data; in intel_pmu_set_msr()423 pmu->global_ctrl = data; in intel_pmu_set_msr()664 pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0; in intel_pmu_reset()784 for_each_set_bit(bit, (unsigned long *)&pmu->global_ctrl, in intel_pmu_cross_mapped_check()
7089 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()
290 uint64_t global_ctrl; member
222 reg = &ctxt->global_ctrl; in xen_intel_pmu_emulate()
4035 int global_ctrl, pebs_enable; in intel_guest_get_msrs() local4038 global_ctrl = (*nr)++; in intel_guest_get_msrs()4039 arr[global_ctrl] = (struct perf_guest_switch_msr){ in intel_guest_get_msrs()4095 arr[global_ctrl].guest &= ~kvm_pmu->host_cross_mapped_mask; in intel_guest_get_msrs()4097 arr[global_ctrl].guest |= arr[pebs_enable].guest; in intel_guest_get_msrs()
523 u64 global_ctrl; member
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