Searched refs:gpu_write64 (Results 1 – 5 of 5) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/msm/adreno/ |
| A D | a5xx_preempt.c | 139 gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO, in a5xx_preempt_trigger()
214 gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_LO, 0); in a5xx_preempt_hw_init()
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| A D | a5xx_gpu.c | 608 gpu_write64(gpu, REG_A5XX_CP_ME_INSTR_BASE_LO, a5xx_gpu->pm4_iova); in a5xx_ucode_init()
610 gpu_write64(gpu, REG_A5XX_CP_PFP_INSTR_BASE_LO, a5xx_gpu->pfp_iova); in a5xx_ucode_init()
869 gpu_write64(gpu, REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO, 0x00000000); in a5xx_hw_init()
908 gpu_write64(gpu, REG_A5XX_CP_RB_BASE, gpu->rb[0]->iova); in a5xx_hw_init()
934 gpu_write64(gpu, REG_A5XX_CP_RB_RPTR_ADDR, in a5xx_hw_init()
1463 gpu_write64(gpu, REG_A5XX_CP_CRASH_SCRIPT_BASE_LO, dumper->iova); in a5xx_crashdumper_run()
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| A D | a6xx_gpu.c | 949 gpu_write64(gpu, REG_A6XX_CP_SQE_INSTR_BASE, a6xx_gpu->sqe_iova); in a6xx_ucode_init()
1000 gpu_write64(gpu, REG_A6XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO, 0x00000000); in hw_init()
1049 gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MIN_LO, 0x00100000); in hw_init()
1051 gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MAX_LO, in hw_init()
1143 gpu_write64(gpu, REG_A6XX_CP_RB_BASE, gpu->rb[0]->iova); in hw_init()
1174 gpu_write64(gpu, REG_A6XX_CP_RB_RPTR_ADDR_LO, in hw_init()
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| A D | a6xx_gpu_state.c | 150 gpu_write64(gpu, REG_A6XX_CP_CRASH_SCRIPT_BASE_LO, dumper->iova); in a6xx_crashdumper_run()
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| /linux-6.3-rc2/drivers/gpu/drm/msm/ |
| A D | msm_gpu.h | 584 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64() function
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