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Searched refs:gvt (Results 1 – 25 of 33) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/
A DMakefile5 gvt/cfg_space.o \
7 gvt/debugfs.o \
8 gvt/display.o \
9 gvt/dmabuf.o \
10 gvt/edid.o \
11 gvt/execlist.o \
13 gvt/firmware.o \
14 gvt/gtt.o \
17 gvt/kvmgt.o \
18 gvt/mmio.o \
[all …]
A Daperture_gm.c44 struct intel_gvt *gvt = vgpu->gvt; in alloc_gm() local
45 struct intel_gt *gt = gvt->gt; in alloc_gm()
82 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_gm() local
83 struct intel_gt *gt = gvt->gt; in alloc_vgpu_gm()
110 struct intel_gvt *gvt = vgpu->gvt; in free_vgpu_gm() local
132 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_write_fence() local
168 struct intel_gvt *gvt = vgpu->gvt; in free_vgpu_fence() local
193 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_fence() local
235 struct intel_gvt *gvt = vgpu->gvt; in free_resource() local
245 struct intel_gvt *gvt = vgpu->gvt; in alloc_resource() local
[all …]
A Dsched_policy.c68 struct intel_gvt *gvt; member
213 struct intel_gvt *gvt = sched_data->gvt; in tbs_sched_func() local
245 mutex_lock(&gvt->sched_lock); in intel_gvt_schedule()
280 &gvt->scheduler; in tbs_sched_init()
292 data->gvt = gvt; in tbs_sched_init()
302 &gvt->scheduler; in tbs_sched_clean()
330 struct intel_gvt *gvt = vgpu->gvt; in tbs_sched_clean_vgpu() local
384 mutex_lock(&gvt->sched_lock); in intel_gvt_init_sched_policy()
386 ret = gvt->scheduler.sched_ops->init(gvt); in intel_gvt_init_sched_policy()
395 gvt->scheduler.sched_ops->clean(gvt); in intel_gvt_clean_sched_policy()
[all …]
A Dgvt.h372 return i915->gvt; in to_gvt()
406 #define gvt_to_ggtt(gvt) ((gvt)->gt->ggtt) argument
409 #define gvt_aperture_sz(gvt) gvt_to_ggtt(gvt)->mappable_end argument
410 #define gvt_aperture_pa_base(gvt) gvt_to_ggtt(gvt)->gmadr.start argument
412 #define gvt_ggtt_gm_sz(gvt) gvt_to_ggtt(gvt)->vm.total argument
413 #define gvt_ggtt_sz(gvt) (gvt_to_ggtt(gvt)->vm.total >> PAGE_SHIFT << 3) argument
414 #define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt)) argument
417 #define gvt_aperture_gmadr_end(gvt) (gvt_aperture_gmadr_base(gvt) \ argument
420 #define gvt_hidden_gmadr_base(gvt) (gvt_aperture_gmadr_base(gvt) \ argument
422 #define gvt_hidden_gmadr_end(gvt) (gvt_hidden_gmadr_base(gvt) \ argument
[all …]
A Dmmio.c57 #define reg_is_mmio(gvt, reg) \ argument
60 #define reg_is_gtt(gvt, reg) \ argument
62 && reg < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt))
67 struct intel_gvt *gvt = NULL; in failsafe_emulate_mmio_rw() local
74 gvt = vgpu->gvt; in failsafe_emulate_mmio_rw()
77 if (reg_is_mmio(gvt, offset)) { in failsafe_emulate_mmio_rw()
109 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_emulate_mmio_read() local
125 if (reg_is_gtt(gvt, offset)) { in intel_vgpu_emulate_mmio_read()
184 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_emulate_mmio_write() local
201 if (reg_is_gtt(gvt, offset)) { in intel_vgpu_emulate_mmio_write()
[all …]
A Dvgpu.c113 if (!gvt->types) in intel_gvt_init_vgpu_types()
116 gvt->mdev_types = kcalloc(num_types, sizeof(*gvt->mdev_types), in intel_gvt_init_vgpu_types()
140 gvt->mdev_types[i] = &gvt->types[i].type; in intel_gvt_init_vgpu_types()
141 gvt->mdev_types[i]->sysfs_name = gvt->types[i].name; in intel_gvt_init_vgpu_types()
144 gvt->num_types = i; in intel_gvt_init_vgpu_types()
150 kfree(gvt->types); in intel_gvt_init_vgpu_types()
157 kfree(gvt->types); in intel_gvt_clean_vgpu_types()
226 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_destroy_vgpu() local
277 vgpu->gvt = gvt; in intel_gvt_create_idle_vgpu()
314 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_create_vgpu() local
[all …]
A Ddebugfs.c87 struct intel_gvt *gvt = vgpu->gvt; in vgpu_mmio_diff_show() local
97 mutex_lock(&gvt->lock); in vgpu_mmio_diff_show()
98 spin_lock_bh(&gvt->scheduler.mmio_context_lock); in vgpu_mmio_diff_show()
100 mmio_hw_access_pre(gvt->gt); in vgpu_mmio_diff_show()
103 mmio_hw_access_post(gvt->gt); in vgpu_mmio_diff_show()
106 mutex_unlock(&gvt->lock); in vgpu_mmio_diff_show()
195 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_debugfs_remove_vgpu() local
198 if (minor->debugfs_root && gvt->debugfs_root) { in intel_gvt_debugfs_remove_vgpu()
215 &gvt->mmio.num_tracked_mmio); in intel_gvt_debugfs_init()
227 debugfs_remove_recursive(gvt->debugfs_root); in intel_gvt_debugfs_clean()
[all …]
A Dfirmware.c72 struct drm_i915_private *i915 = gvt->gt->i915; in expose_firmware_sysfs()
105 memcpy(p, gvt->firmware.mmio, info->mmio_size); in expose_firmware_sysfs()
134 void intel_gvt_free_firmware(struct intel_gvt *gvt) in intel_gvt_free_firmware() argument
136 if (!gvt->firmware.firmware_loaded) in intel_gvt_free_firmware()
137 clean_firmware_sysfs(gvt); in intel_gvt_free_firmware()
139 kfree(gvt->firmware.cfg_space); in intel_gvt_free_firmware()
140 vfree(gvt->firmware.mmio); in intel_gvt_free_firmware()
143 static int verify_firmware(struct intel_gvt *gvt, in verify_firmware() argument
198 int intel_gvt_load_firmware(struct intel_gvt *gvt) in intel_gvt_load_firmware() argument
244 ret = verify_firmware(gvt, fw); in intel_gvt_load_firmware()
[all …]
A Dkvmgt.c845 struct intel_gvt *gvt = vgpu->gvt; in gtt_entry() local
856 offset < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt)) ? in gtt_entry()
1446 vgpu->gvt = kdev_to_i915(mdev->type->parent->dev)->gvt; in intel_vgpu_init_dev()
1517 struct intel_gvt *gvt = kdev_to_i915(mtype->parent->dev)->gvt; in intel_vgpu_get_available() local
1837 struct intel_gvt *gvt = fetch_and_zero(&i915->gvt); in intel_gvt_clean_device() local
1856 kfree(i915->gvt); in intel_gvt_clean_device()
1880 if (!gvt) in intel_gvt_init_device()
1890 i915->gvt = gvt; in intel_gvt_init_device()
1944 gvt->mdev_types, gvt->num_types); in intel_gvt_init_device()
1972 kfree(gvt); in intel_gvt_init_device()
[all …]
A Dgtt.c670 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_get_entry() local
699 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_set_entry() local
1332 struct intel_gvt *gvt = vgpu->gvt; in ppgtt_populate_spt() local
1456 struct intel_gvt *gvt = vgpu->gvt; in sync_oos_page() local
1498 struct intel_gvt *gvt = vgpu->gvt; in detach_oos_page() local
1808 struct intel_gvt *gvt = vgpu->gvt; in invalidate_ppgtt_mm() local
1838 struct intel_gvt *gvt = vgpu->gvt; in shadow_ppgtt_mm() local
1912 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_create_ppgtt_mm() local
2120 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_gma_to_gpa() local
2257 struct intel_gvt *gvt = vgpu->gvt; in emulate_ggtt_mmio_write() local
[all …]
A Dmmio.h73 intel_gvt_render_mmio_to_engine(struct intel_gvt *gvt, unsigned int reg);
74 unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt);
76 int intel_gvt_setup_mmio_info(struct intel_gvt *gvt);
77 void intel_gvt_clean_mmio_info(struct intel_gvt *gvt);
78 int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt,
79 int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
82 struct intel_gvt_mmio_info *intel_gvt_find_mmio_info(struct intel_gvt *gvt,
101 bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt,
110 void intel_gvt_restore_fence(struct intel_gvt *gvt);
111 void intel_gvt_restore_mmio(struct intel_gvt *gvt);
A Dinterrupt.c150 struct intel_gvt *gvt, in regbase_to_irq_info() argument
153 struct intel_gvt_irq *irq = &gvt->irq; in regbase_to_irq_info()
181 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_imr_handler() local
211 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_master_irq_handler() local
250 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_ier_handler() local
537 struct intel_gvt *gvt = irq_to_gvt(irq); in gen8_init_irq() local
582 if (HAS_ENGINE(gvt->gt, VCS1)) { in gen8_init_irq()
614 if (IS_BROADWELL(gvt->gt->i915)) { in gen8_init_irq()
665 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_trigger_virtual_event() local
666 struct intel_gvt_irq *irq = &gvt->irq; in intel_vgpu_trigger_virtual_event()
[all …]
A Dsched_policy.h41 int (*init)(struct intel_gvt *gvt);
42 void (*clean)(struct intel_gvt *gvt);
49 void intel_gvt_schedule(struct intel_gvt *gvt);
51 int intel_gvt_init_sched_policy(struct intel_gvt *gvt);
53 void intel_gvt_clean_sched_policy(struct intel_gvt *gvt);
63 void intel_gvt_kick_schedule(struct intel_gvt *gvt);
A Dhandlers.c251 struct intel_gvt *gvt = vgpu->gvt; in fence_mmio_write() local
260 mmio_hw_access_pre(gvt->gt); in fence_mmio_write()
263 mmio_hw_access_post(gvt->gt); in fence_mmio_write()
1941 struct intel_gvt *gvt = vgpu->gvt; in mmio_read_from_hw() local
2824 kfree(gvt->mmio.mmio_block); in intel_gvt_clean_mmio_info()
2825 gvt->mmio.mmio_block = NULL; in intel_gvt_clean_mmio_info()
2894 gvt->mmio.num_mmio_block++; in handle_mmio_block()
2911 .i915 = gvt->gt->i915, in init_mmio_info()
2912 .data = gvt, in init_mmio_info()
2957 ret = init_mmio_info(gvt); in intel_gvt_setup_mmio_info()
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A Dmmio_context.c168 struct intel_gvt *gvt = engine->i915->gvt; in load_render_mocs() local
171 u32 *regs = gvt->engine_mmio_list.mocs_mmio_offset_list; in load_render_mocs()
207 struct intel_gvt *gvt = vgpu->gvt; in restore_context_mmio_for_inhibit() local
223 for (mmio = gvt->engine_mmio_list.mmio; in restore_context_mmio_for_inhibit()
485 for (mmio = engine->i915->gvt->engine_mmio_list.mmio; in switch_mmio()
588 if (GRAPHICS_VER(gvt->gt->i915) >= 9) { in intel_gvt_init_engine_mmio_context()
589 gvt->engine_mmio_list.mmio = gen9_engine_mmio_list; in intel_gvt_init_engine_mmio_context()
595 gvt->engine_mmio_list.mmio = gen8_engine_mmio_list; in intel_gvt_init_engine_mmio_context()
600 for (mmio = gvt->engine_mmio_list.mmio; in intel_gvt_init_engine_mmio_context()
603 gvt->engine_mmio_list.ctx_mmio_count[mmio->id]++; in intel_gvt_init_engine_mmio_context()
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A Dscheduler.c130 struct intel_gvt *gvt = vgpu->gvt; in populate_shadow_context() local
524 struct intel_gvt *gvt = workload->vgpu->gvt; in prepare_shadow_batch_buffer() local
853 mutex_lock(&gvt->sched_lock); in pick_next_workload()
902 mutex_unlock(&gvt->sched_lock); in pick_next_workload()
1077 mutex_lock(&gvt->sched_lock); in complete_current_workload()
1143 if (gvt->scheduler.need_reschedule) in complete_current_workload()
1146 mutex_unlock(&gvt->sched_lock); in complete_current_workload()
1154 struct intel_gvt *gvt = engine->i915->gvt; in workload_thread() local
1231 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_wait_vgpu_idle() local
1250 for_each_engine(engine, gvt->gt, i) { in intel_gvt_clean_workload_scheduler()
[all …]
A Dcfg_space.c120 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_cfg_read()
126 offset + bytes > vgpu->gvt->device_info.cfg_space_size)) in intel_vgpu_emulate_cfg_read()
259 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_cfg_write()
266 offset + bytes > vgpu->gvt->device_info.cfg_space_size)) in intel_vgpu_emulate_cfg_write()
322 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_init_cfg_space() local
323 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev); in intel_vgpu_init_cfg_space()
324 const struct intel_gvt_device_info *info = &gvt->device_info; in intel_vgpu_init_cfg_space()
328 memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, in intel_vgpu_init_cfg_space()
343 gvt_aperture_pa_base(gvt), true); in intel_vgpu_init_cfg_space()
A Dcmd_parser.c895 struct intel_gvt *gvt = vgpu->gvt; in cmd_reg_handler() local
925 (IS_BROADWELL(gvt->gt->i915) && in cmd_reg_handler()
1094 struct intel_gvt *gvt = s->vgpu->gvt; in cmd_handler_lrm() local
3105 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_update_reg_whitelist() local
3109 if (gvt->is_reg_whitelist_updated) in intel_gvt_update_reg_whitelist()
3154 gvt->is_reg_whitelist_updated = true; in intel_gvt_update_reg_whitelist()
3229 add_cmd_entry(gvt, e); in init_cmd_table()
3247 hash_init(gvt->cmd_table); in clean_cmd_table()
3252 clean_cmd_table(gvt); in intel_gvt_clean_cmd_parser()
3259 ret = init_cmd_table(gvt); in intel_gvt_init_cmd_parser()
[all …]
A Dcmd_parser.h46 void intel_gvt_clean_cmd_parser(struct intel_gvt *gvt);
48 int intel_gvt_init_cmd_parser(struct intel_gvt *gvt);
A Ddisplay.c64 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in edp_pipe_is_enabled()
76 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in pipe_is_enabled()
176 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in emulate_monitor_status_change()
532 intel_gvt_request_service(vgpu->gvt, in vblank_timer_fn()
541 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in setup_virtual_dp_monitor()
624 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in emulate_vblank_on_pipe()
656 for_each_pipe(vgpu->gvt->gt->i915, pipe) in intel_vgpu_emulate_vblank()
671 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_hotplug()
760 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_clean_display()
786 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_init_display()
A Dgtt.h226 int intel_gvt_init_gtt(struct intel_gvt *gvt);
228 void intel_gvt_clean_gtt(struct intel_gvt *gvt);
295 void intel_gvt_restore_ggtt(struct intel_gvt *gvt);
A Dscheduler.h141 int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt);
143 void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt);
A Dedid.c140 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in gmbus0_mmio_write()
281 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in gmbus3_mmio_write()
378 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_gmbus_read()
408 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_gmbus_write()
484 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_aux_ch_write()
A Dmmio_context.h63 void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt);
A Dfb_decoder.c150 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_get_stride()
206 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_decode_primary_plane()
336 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_decode_cursor_plane()

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