Searched refs:hart (Results 1 – 10 of 10) sorted by relevance
| /linux-6.3-rc2/arch/riscv/kernel/ |
| A D | smpboot.c | 77 unsigned long hart; in setup_smp() local
85 rc = riscv_of_processor_hartid(dn, &hart); in setup_smp()
89 if (hart == cpuid_to_hartid_map(0)) { in setup_smp()
97 cpuid, hart); in setup_smp()
101 cpuid_to_hartid_map(cpuid) = hart; in setup_smp()
|
| A D | cpu.c | 20 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart) in riscv_of_processor_hartid() argument
29 *hart = (unsigned long) of_get_cpu_hwid(node, 0); in riscv_of_processor_hartid()
30 if (*hart == ~0UL) { in riscv_of_processor_hartid()
36 pr_info("CPU with hartid=%lu is not available\n", *hart); in riscv_of_processor_hartid()
41 pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart); in riscv_of_processor_hartid()
45 pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa); in riscv_of_processor_hartid()
|
| /linux-6.3-rc2/Documentation/devicetree/bindings/riscv/ |
| A D | cpus.yaml | 18 hart: A hardware execution context, which contains all the state
54 Identifies that the hart uses the RISC-V instruction set
55 and identifies the type of the hart.
60 hart. These values originate from the RISC-V Privileged
78 supported by the hart. These are documented in the RISC-V
115 by this hart (see ./idle-states.yaml).
|
| /linux-6.3-rc2/Documentation/devicetree/bindings/interrupt-controller/ |
| A D | riscv,cpu-intc.txt | 7 Every interrupt is ultimately routed through a hart's HLIC before it
8 interrupts that hart.
40 definition of the hart whose CSRs control these local interrupts.
|
| A D | sifive,plic-1.0.0.yaml | 14 external interrupts in the system to all hart contexts in the system, via
15 the external interrupt source in each hart.
17 A hart context is a privilege mode in a hardware execution thread. For example,
19 privilege modes per hart; machine mode and supervisor mode.
|
| /linux-6.3-rc2/tools/perf/pmu-events/arch/riscv/ |
| A D | mapfile.csv | 6 # MARCHID base microarchitecture of the hart
|
| /linux-6.3-rc2/arch/riscv/ |
| A D | Kconfig | 503 Since spinwait is incompatible with sparse hart IDs, it requires
504 NR_CPUS be large enough to contain the physical hart ID of the first
505 hart to enter Linux.
|
| /linux-6.3-rc2/Documentation/devicetree/bindings/iio/addac/ |
| A D | adi,ad74115.yaml | 187 adi,dac-hart-slew:
|
| /linux-6.3-rc2/Documentation/devicetree/bindings/cpu/ |
| A D | idle-states.yaml | 57 RISC-V SBI v0.3 (or higher) [7] hart state management extension provides a
60 The platform specific suspend (or idle) states of a hart can be either
|
| /linux-6.3-rc2/drivers/clocksource/ |
| A D | Kconfig | 629 This enables the per-hart timer built into all RISC-V systems, which
|
Completed in 15 milliseconds