Searched refs:hw_ste_p (Results 1 – 6 of 6) sorted by relevance
| /linux-6.3-rc2/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| A D | dr_ste_v1.h | 10 bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p);
11 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);
12 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);
13 void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);
14 u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p);
15 void dr_ste_v1_set_next_lu_type(u8 *hw_ste_p, u16 lu_type);
16 u16 dr_ste_v1_get_next_lu_type(u8 *hw_ste_p);
17 void dr_ste_v1_set_hit_addr(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
18 void dr_ste_v1_init(u8 *hw_ste_p, u16 lu_type, bool is_rx, u16 gvmi);
19 void dr_ste_v1_prepare_for_postsend(u8 *hw_ste_p, u32 ste_size);
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| A D | dr_ste.h | 150 void (*ste_init)(u8 *hw_ste_p, u16 lu_type,
152 void (*set_next_lu_type)(u8 *hw_ste_p, u16 lu_type);
153 u16 (*get_next_lu_type)(u8 *hw_ste_p);
154 bool (*is_miss_addr_set)(u8 *hw_ste_p);
155 void (*set_miss_addr)(u8 *hw_ste_p, u64 miss_addr);
156 u64 (*get_miss_addr)(u8 *hw_ste_p);
157 void (*set_hit_addr)(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
158 void (*set_byte_mask)(u8 *hw_ste_p, u16 byte_mask);
159 u16 (*get_byte_mask)(u8 *hw_ste_p);
200 void (*prepare_for_postsend)(u8 *hw_ste_p, u32 ste_size);
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| A D | dr_ste_v0.c | 241 static u8 dr_ste_v0_get_entry_type(u8 *hw_ste_p) in dr_ste_v0_get_entry_type() argument
255 static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p) in dr_ste_v0_get_miss_addr() argument
269 static u16 dr_ste_v0_get_byte_mask(u8 *hw_ste_p) in dr_ste_v0_get_byte_mask() argument
271 return MLX5_GET(ste_general, hw_ste_p, byte_mask); in dr_ste_v0_get_byte_mask()
305 dr_ste_v0_set_entry_type(hw_ste_p, entry_type); in dr_ste_v0_init_full()
306 dr_ste_v0_set_lu_type(hw_ste_p, lu_type); in dr_ste_v0_init_full()
341 MLX5_SET(ste_sx_transmit, hw_ste_p, go_back, 1); in dr_ste_v0_set_go_back_bit()
347 MLX5_SET(ste_sx_transmit, hw_ste_p, action_type, in dr_ste_v0_set_tx_push_vlan()
354 dr_ste_v0_set_go_back_bit(hw_ste_p); in dr_ste_v0_set_tx_push_vlan()
360 MLX5_SET(ste_sx_transmit, hw_ste_p, action_type, in dr_ste_v0_set_tx_encap()
[all …]
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| A D | dr_ste_v1.c | 289 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p) in dr_ste_v1_get_miss_addr() argument
303 u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p) in dr_ste_v1_get_byte_mask() argument
353 u8 *tag = hw_ste_p + DR_STE_SIZE_CTRL; in dr_ste_v1_prepare_for_postsend()
397 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_encap()
417 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_insert_hdr()
432 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_remove_hdr()
446 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_push_vlan()
459 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_pop_vlan()
483 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_encap_l3()
495 dr_ste_v1_set_reparse(hw_ste_p); in dr_ste_v1_set_rx_decap()
[all …]
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| A D | dr_ste.c | 26 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl) in mlx5dr_ste_calc_hash_index() argument
29 struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; in mlx5dr_ste_calc_hash_index()
67 static u8 *dr_ste_get_tag(u8 *hw_ste_p) in dr_ste_get_tag() argument
69 struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; in dr_ste_get_tag()
74 void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask) in mlx5dr_ste_set_bit_mask() argument
94 u8 *hw_ste_p) in mlx5dr_ste_is_miss_addr_set() argument
100 return ste_ctx->is_miss_addr_set(hw_ste_p); in mlx5dr_ste_is_miss_addr_set()
104 u8 *hw_ste_p, u64 miss_addr) in mlx5dr_ste_set_miss_addr() argument
106 ste_ctx->set_miss_addr(hw_ste_p, miss_addr); in mlx5dr_ste_set_miss_addr()
393 u8 *hw_ste_p, u32 ste_size) in mlx5dr_ste_prepare_for_postsend() argument
[all …]
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| A D | dr_types.h | 241 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl);
242 bool mlx5dr_ste_is_miss_addr_set(struct mlx5dr_ste_ctx *ste_ctx, u8 *hw_ste_p);
250 void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask);
1347 u8 *hw_ste_p, u32 ste_size);
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