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Searched refs:hwdata (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/clk/
A Dclk-si5351.c409 return _si5351_pll_reparent(hwdata->drvdata, hwdata->num, in si5351_pll_set_parent()
424 si5351_read_parameters(hwdata->drvdata, reg, &hwdata->params); in si5351_pll_recalc_rate()
430 rate = hwdata->params.p1 * hwdata->params.p3; in si5351_pll_recalc_rate()
439 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_pll_recalc_rate()
526 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_pll_set_rate()
594 return _si5351_msynth_reparent(hwdata->drvdata, hwdata->num, in si5351_msynth_set_parent()
625 m = hwdata->params.p1 * hwdata->params.p3; in si5351_msynth_recalc_rate()
637 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_msynth_recalc_rate()
782 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_msynth_set_rate()
943 _si5351_clkout_reset_pll(hwdata->drvdata, hwdata->num); in si5351_clkout_prepare()
[all …]
A Dclk-versaclock5.c466 hwdata->div_int = div_int; in vc5_pll_round_rate()
479 fb[0] = hwdata->div_int >> 4; in vc5_pll_set_rate()
480 fb[1] = hwdata->div_int << 4; in vc5_pll_set_rate()
482 fb[3] = hwdata->div_frc >> 8; in vc5_pll_set_rate()
483 fb[4] = hwdata->div_frc; in vc5_pll_set_rate()
548 hwdata->div_int = div_int; in vc5_fod_round_rate()
560 hwdata->div_frc >> 22, hwdata->div_frc >> 14, in vc5_fod_set_rate()
561 hwdata->div_frc >> 6, hwdata->div_frc << 2, in vc5_fod_set_rate()
564 hwdata->div_int >> 4, hwdata->div_int << 4, in vc5_fod_set_rate()
646 hwdata->num, hwdata->clk_output_cfg0_mask, in vc5_clk_out_prepare()
[all …]
/linux-6.3-rc2/drivers/gpio/
A Dgpio-mxc.c74 const struct mxc_gpio_hwdata *hwdata; member
122 #define GPIO_DR (port->hwdata->dr_reg)
123 #define GPIO_GDIR (port->hwdata->gdir_reg)
124 #define GPIO_PSR (port->hwdata->psr_reg)
125 #define GPIO_ICR1 (port->hwdata->icr1_reg)
126 #define GPIO_ICR2 (port->hwdata->icr2_reg)
127 #define GPIO_IMR (port->hwdata->imr_reg)
128 #define GPIO_ISR (port->hwdata->isr_reg)
129 #define GPIO_EDGE_SEL (port->hwdata->edge_sel_reg)
131 #define GPIO_INT_LOW_LEV (port->hwdata->low_level)
[all …]
/linux-6.3-rc2/drivers/i2c/busses/
A Di2c-imx.c213 const struct imx_i2c_hwdata *hwdata; member
308 return i2c_imx->hwdata->devtype == IMX1_I2C; in is_imx1_i2c()
313 return i2c_imx->hwdata->devtype == VF610_I2C; in is_vf610_i2c()
337 temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits; in i2c_imx_clear_irq()
371 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
390 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
597 i = i2c_imx->hwdata->ndivs - 1; in i2c_imx_set_clk()
695 temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, in i2c_imx_stop()
850 temp = i2c_imx->hwdata->i2cr_ien_opcode; in i2c_imx_slave_init()
1469 i2c_imx->hwdata = match; in i2c_imx_probe()
[all …]
/linux-6.3-rc2/drivers/clk/renesas/
A Drzg2l-cpg.c193 struct sd_hw_data *hwdata = to_sd_hw_data(hw); in rzg2l_cpg_sd_clk_mux_set_parent() local
194 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_sd_clk_mux_set_parent()
195 u32 off = GET_REG_OFFSET(hwdata->conf); in rzg2l_cpg_sd_clk_mux_set_parent()
196 u32 shift = GET_SHIFT(hwdata->conf); in rzg2l_cpg_sd_clk_mux_set_parent()
236 struct sd_hw_data *hwdata = to_sd_hw_data(hw); in rzg2l_cpg_sd_clk_mux_get_parent() local
237 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_sd_clk_mux_get_parent()
240 val >>= GET_SHIFT(hwdata->conf); in rzg2l_cpg_sd_clk_mux_get_parent()
241 val &= GENMASK(GET_WIDTH(hwdata->conf) - 1, 0); in rzg2l_cpg_sd_clk_mux_get_parent()
446 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_pll5_4_clk_mux_determine_rate()
458 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_pll5_4_clk_mux_set_parent()
[all …]
/linux-6.3-rc2/tools/usb/usbip/
A Dconfigure.ac89 [where usb.ids is found (default /usr/share/hwdata/)])],
90 [USBIDS_DIR=$withval], [USBIDS_DIR="/usr/share/hwdata/"])
A DREADME46 - hwdata
/linux-6.3-rc2/drivers/block/mtip32xx/
A Dmtip32xx.c2308 u32 hwdata; in hba_setup() local
2309 hwdata = readl(dd->mmio + HOST_HSORG); in hba_setup()
2312 writel(hwdata | in hba_setup()
2335 u32 hwdata; in mtip_detect_product() local
2345 hwdata = readl(dd->mmio + HOST_HSORG); in mtip_detect_product()
2350 if (hwdata & 0x8) { in mtip_detect_product()
2352 rev = (hwdata & HSORG_HWREV) >> 8; in mtip_detect_product()
2353 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; in mtip_detect_product()

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