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Searched refs:ib_cntl (Results 1 – 11 of 11) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dsdma_v2_4.c339 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_stop() local
348 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
349 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v2_4_gfx_stop()
350 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
405 u32 rb_cntl, ib_cntl; in sdma_v2_4_gfx_resume() local
462 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
463 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v2_4_gfx_resume()
465 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v2_4_gfx_resume()
468 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
A Dsdma_v4_0.c875 u32 rb_cntl, ib_cntl; in sdma_v4_0_gfx_enable() local
885 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, enable ? 1 : 0); in sdma_v4_0_gfx_enable()
911 u32 rb_cntl, ib_cntl; in sdma_v4_0_page_stop() local
922 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_PAGE_IB_CNTL, in sdma_v4_0_page_stop()
1046 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_gfx_resume() local
1111 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v4_0_gfx_resume()
1113 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v4_0_gfx_resume()
1116 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_resume()
1133 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v4_0_page_resume() local
1199 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_PAGE_IB_CNTL, IB_ENABLE, 1); in sdma_v4_0_page_resume()
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A Dsdma_v3_0.c513 u32 rb_cntl, ib_cntl; in sdma_v3_0_gfx_stop() local
522 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
523 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v3_0_gfx_stop()
524 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
640 u32 rb_cntl, ib_cntl, wptr_poll_cntl; in sdma_v3_0_gfx_resume() local
730 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
731 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v3_0_gfx_resume()
733 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v3_0_gfx_resume()
736 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
A Dsdma_v6_0.c378 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_stop() local
387 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_stop()
388 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 0); in sdma_v6_0_gfx_stop()
389 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_stop()
456 u32 rb_cntl, ib_cntl; in sdma_v6_0_gfx_resume() local
572 ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL)); in sdma_v6_0_gfx_resume()
573 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1); in sdma_v6_0_gfx_resume()
575 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v6_0_gfx_resume()
578 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl); in sdma_v6_0_gfx_resume()
A Dsdma_v5_2.c364 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_stop() local
373 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
374 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_2_gfx_stop()
375 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
486 u32 rb_cntl, ib_cntl; in sdma_v5_2_gfx_resume() local
612 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_resume()
613 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_2_gfx_resume()
615 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_2_gfx_resume()
618 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_resume()
A Dsdma_v5_0.c561 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_stop() local
570 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
571 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0); in sdma_v5_0_gfx_stop()
572 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
685 u32 rb_cntl, ib_cntl; in sdma_v5_0_gfx_resume() local
814 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume()
815 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1); in sdma_v5_0_gfx_resume()
817 ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1); in sdma_v5_0_gfx_resume()
820 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume()
A Dsi_dma.c131 u32 rb_cntl, dma_cntl, ib_cntl, rb_bufsz; in si_dma_start() local
163 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in si_dma_start()
165 ib_cntl |= DMA_IB_SWAP_ENABLE; in si_dma_start()
167 WREG32(DMA_IB_CNTL + sdma_offsets[i], ib_cntl); in si_dma_start()
A Dcik_sdma.c429 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
486 ib_cntl = SDMA0_GFX_IB_CNTL__IB_ENABLE_MASK; in cik_sdma_gfx_resume()
488 ib_cntl |= SDMA0_GFX_IB_CNTL__IB_SWAP_ENABLE_MASK; in cik_sdma_gfx_resume()
491 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in cik_sdma_gfx_resume()
/linux-6.3-rc2/drivers/gpu/drm/radeon/
A Dni_dma.c189 u32 rb_cntl, dma_cntl, ib_cntl; in cayman_dma_resume() local
232 ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; in cayman_dma_resume()
234 ib_cntl |= DMA_IB_SWAP_ENABLE; in cayman_dma_resume()
236 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
A Dr600_dma.c122 u32 rb_cntl, dma_cntl, ib_cntl; in r600_dma_resume() local
153 ib_cntl = DMA_IB_ENABLE; in r600_dma_resume()
155 ib_cntl |= DMA_IB_SWAP_ENABLE; in r600_dma_resume()
157 WREG32(DMA_IB_CNTL, ib_cntl); in r600_dma_resume()
A Dcik_sdma.c367 u32 rb_cntl, ib_cntl; in cik_sdma_gfx_resume() local
416 ib_cntl = SDMA_IB_ENABLE; in cik_sdma_gfx_resume()
418 ib_cntl |= SDMA_IB_SWAP_ENABLE; in cik_sdma_gfx_resume()
421 WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl); in cik_sdma_gfx_resume()

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