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Searched refs:intel_de_write (Results 1 – 25 of 52) sorted by relevance

123

/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_vdsc.c619 intel_de_write(dev_priv, in intel_dsc_pps_configure()
643 intel_de_write(dev_priv, in intel_dsc_pps_configure()
668 intel_de_write(dev_priv, in intel_dsc_pps_configure()
693 intel_de_write(dev_priv, in intel_dsc_pps_configure()
718 intel_de_write(dev_priv, in intel_dsc_pps_configure()
743 intel_de_write(dev_priv, in intel_dsc_pps_configure()
770 intel_de_write(dev_priv, in intel_dsc_pps_configure()
795 intel_de_write(dev_priv, in intel_dsc_pps_configure()
820 intel_de_write(dev_priv, in intel_dsc_pps_configure()
845 intel_de_write(dev_priv, in intel_dsc_pps_configure()
[all …]
A Dintel_fdi.c350 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
369 intel_de_write(dev_priv, reg, in intel_fdi_normal_train()
399 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
446 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
452 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
463 intel_de_write(dev_priv, reg, in ilk_fdi_link_train()
506 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
555 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
610 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
706 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
[all …]
A Dvlv_dsi.c112 intel_de_write(dev_priv, reg, val); in write_data()
174 intel_de_write(dev_priv, MIPI_INTR_STAT(port), in intel_dsi_host_transfer()
184 intel_de_write(dev_priv, ctrl_reg, in intel_dsi_host_transfer()
343 intel_de_write(dev_priv, MIPI_CTRL(port), in glk_dsi_enable_io()
359 intel_de_write(dev_priv, MIPI_CTRL(port), tmp); in glk_dsi_enable_io()
394 intel_de_write(dev_priv, MIPI_CTRL(PORT_A), in glk_dsi_device_ready()
660 intel_de_write(dev_priv, MIPI_CTRL(port), in intel_dsi_port_enable()
874 intel_de_write(dev_priv, in intel_dsi_pre_enable()
1424 intel_de_write(dev_priv, MIPI_CTRL(PORT_A), in intel_dsi_prepare()
1430 intel_de_write(dev_priv, MIPI_CTRL(port), in intel_dsi_prepare()
[all …]
A Dintel_pch_display.c125 intel_de_write(dev_priv, hdmi_reg, val); in ibx_sanitize_pch_hdmi_port()
144 intel_de_write(dev_priv, dp_reg, val); in ibx_sanitize_pch_dp_port()
264 intel_de_write(dev_priv, reg, val); in ilk_enable_pch_transcoder()
322 intel_de_write(dev_priv, reg, val); in ilk_disable_pch_transcoder()
333 intel_de_write(dev_priv, reg, val); in ilk_disable_pch_transcoder()
388 intel_de_write(dev_priv, PCH_DPLL_SEL, temp); in ilk_pch_enable()
438 intel_de_write(dev_priv, reg, temp); in ilk_pch_enable()
468 intel_de_write(dev_priv, reg, temp); in ilk_pch_post_disable()
473 intel_de_write(dev_priv, PCH_DPLL_SEL, temp); in ilk_pch_post_disable()
575 intel_de_write(dev_priv, LPT_TRANSCONF, val); in lpt_enable_pch_transcoder()
[all …]
A Dicl_dsi.c292 intel_de_write(dev_priv, in dsi_program_swing_and_deemphasis()
335 intel_de_write(dev_priv, DSS_CTL1, dss_ctl1); in configure_dual_link_mode()
456 intel_de_write(dev_priv, in gen11_dsi_config_phy_lanes_sequence()
615 intel_de_write(dev_priv, in gen11_dsi_setup_dphy_timings()
624 intel_de_write(dev_priv, in gen11_dsi_setup_dphy_timings()
830 intel_de_write(dev_priv, in gen11_dsi_configure_transcoder()
961 intel_de_write(dev_priv, HTOTAL(dsi_trans), in gen11_dsi_set_transcoder_timings()
984 intel_de_write(dev_priv, HSYNC(dsi_trans), in gen11_dsi_set_transcoder_timings()
998 intel_de_write(dev_priv, VTOTAL(dsi_trans), in gen11_dsi_set_transcoder_timings()
1012 intel_de_write(dev_priv, VSYNC(dsi_trans), in gen11_dsi_set_transcoder_timings()
[all …]
A Dintel_vrr.c186 intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); in intel_vrr_enable()
187 intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); in intel_vrr_enable()
188 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), trans_vrr_ctl(crtc_state)); in intel_vrr_enable()
189 intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); in intel_vrr_enable()
190 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); in intel_vrr_enable()
192 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), in intel_vrr_enable()
205 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), in intel_vrr_send_push()
230 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), in intel_vrr_disable()
235 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); in intel_vrr_disable()
236 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0); in intel_vrr_disable()
A Dintel_combo_phy.c88 intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val); in icl_set_procmon_ref_values()
90 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
314 intel_de_write(dev_priv, ICL_PORT_CL_DW10(phy), val); in intel_combo_phy_power_up_lanes()
351 intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); in icl_combo_phys_init()
359 intel_de_write(dev_priv, ICL_PORT_TX_DW8_GRP(phy), val); in icl_combo_phys_init()
364 intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val); in icl_combo_phys_init()
372 intel_de_write(dev_priv, ICL_PORT_COMP_DW8(phy), val); in icl_combo_phys_init()
377 intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val); in icl_combo_phys_init()
381 intel_de_write(dev_priv, ICL_PORT_CL_DW5(phy), val); in icl_combo_phys_init()
415 intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); in icl_combo_phys_uninit()
[all …]
A Dintel_tv.c933 intel_de_write(dev_priv, TV_CTL, in intel_enable_tv()
946 intel_de_write(dev_priv, TV_CTL, in intel_disable_tv()
1416 intel_de_write(dev_priv, TV_CSC_Y, in set_color_conversion()
1418 intel_de_write(dev_priv, TV_CSC_Y2, in set_color_conversion()
1420 intel_de_write(dev_priv, TV_CSC_U, in set_color_conversion()
1422 intel_de_write(dev_priv, TV_CSC_U2, in set_color_conversion()
1424 intel_de_write(dev_priv, TV_CSC_V, in set_color_conversion()
1426 intel_de_write(dev_priv, TV_CSC_V2, in set_color_conversion()
1542 intel_de_write(dev_priv, TV_CLR_LEVEL, in intel_tv_pre_enable()
1567 intel_de_write(dev_priv, TV_H_LUMA(i), in intel_tv_pre_enable()
[all …]
A Dintel_backlight.c248 intel_de_write(i915, BLC_PWM_CTL, tmp | level); in i9xx_set_backlight()
416 intel_de_write(i915, UTIL_PIN_CTL, val); in bxt_disable_backlight()
582 intel_de_write(i915, BLC_PWM_CTL, 0); in i9xx_enable_backlight()
595 intel_de_write(i915, BLC_PWM_CTL, ctl); in i9xx_enable_backlight()
623 intel_de_write(i915, BLC_PWM_CTL2, ctl2); in i965_enable_backlight()
631 intel_de_write(i915, BLC_PWM_CTL, ctl); in i965_enable_backlight()
638 intel_de_write(i915, BLC_PWM_CTL2, ctl2); in i965_enable_backlight()
690 intel_de_write(i915, UTIL_PIN_CTL, val); in bxt_enable_backlight()
696 intel_de_write(i915, UTIL_PIN_CTL, in bxt_enable_backlight()
1266 intel_de_write(i915, BLC_PWM_PCH_CTL1, in lpt_setup_backlight()
[all …]
A Dg4x_hdmi.c58 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val); in intel_hdmi_prepare()
176 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in g4x_hdmi_enable_port()
214 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
216 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
228 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, in ibx_enable_hdmi()
236 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
238 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi()
276 intel_de_write(dev_priv, TRANS_CHICKEN1(pipe), in cpt_enable_hdmi()
283 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in cpt_enable_hdmi()
293 intel_de_write(dev_priv, TRANS_CHICKEN1(pipe), in cpt_enable_hdmi()
[all …]
A Dintel_fifo_underrun.c103 intel_de_write(dev_priv, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_check_fifo_underruns()
122 intel_de_write(dev_priv, reg, in i9xx_set_fifo_underrun_reporting()
156 intel_de_write(dev_priv, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe)); in ivb_check_fifo_underruns()
169 intel_de_write(dev_priv, GEN7_ERR_INT, in ivb_set_fifo_underrun_reporting()
209 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), in bdw_set_fifo_underrun_reporting()
243 intel_de_write(dev_priv, SERR_INT, in cpt_check_pch_fifo_underruns()
259 intel_de_write(dev_priv, SERR_INT, in cpt_set_fifo_underrun_reporting()
420 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns); in intel_cpu_fifo_underrun_irq_handler()
A Dvlv_dsi_pll.c311 intel_de_write(dev_priv, BXT_DSI_PLL_ENABLE, val); in bxt_dsi_pll_disable()
377 intel_de_write(dev_priv, MIPI_CTRL(port), in vlv_dsi_reset_clocks()
421 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV1, in glk_dsi_program_esc_clock()
423 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV2, in glk_dsi_program_esc_clock()
478 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_program_clocks()
550 intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl); in bxt_dsi_pll_enable()
564 intel_de_write(dev_priv, BXT_DSI_PLL_ENABLE, val); in bxt_dsi_pll_enable()
590 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_reset_clocks()
594 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV1, tmp); in bxt_dsi_reset_clocks()
598 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV2, tmp); in bxt_dsi_reset_clocks()
[all …]
A Dintel_display_power_well.c360 intel_de_write(dev_priv, regs->driver, in hsw_power_well_enable()
389 intel_de_write(dev_priv, regs->driver, in hsw_power_well_disable()
406 intel_de_write(dev_priv, regs->driver, in icl_combo_phy_aux_power_well_enable()
442 intel_de_write(dev_priv, regs->driver, in icl_combo_phy_aux_power_well_disable()
516 intel_de_write(dev_priv, regs->driver, in icl_tc_phy_aux_power_well_enable()
784 intel_de_write(dev_priv, DC_STATE_EN, val); in tgl_disable_dc3co()
1168 intel_de_write(dev_priv, MI_ARB_VLV, in vlv_init_display_clock_gating()
1170 intel_de_write(dev_priv, CBR1_VLV, 0); in vlv_init_display_clock_gating()
1173 intel_de_write(dev_priv, RAWCLK_FREQ_VLV, in vlv_init_display_clock_gating()
1279 intel_de_write(dev_priv, DPIO_CTL, in vlv_dpio_cmn_power_well_enable()
[all …]
A Dintel_crt.c192 intel_de_write(dev_priv, BCLRPAT(crtc->pipe), 0); in intel_crt_set_dpms()
209 intel_de_write(dev_priv, crt->adpa_reg, adpa); in intel_crt_set_dpms()
478 intel_de_write(dev_priv, crt->adpa_reg, adpa); in ilk_crt_detect_hotplug()
535 intel_de_write(dev_priv, crt->adpa_reg, adpa); in valleyview_crt_detect_hotplug()
707 intel_de_write(dev_priv, BCLRPAT(pipe), 0x500050); in intel_crt_load_detect()
712 intel_de_write(dev_priv, PIPECONF(pipe), in intel_crt_load_detect()
737 intel_de_write(dev_priv, VBLANK(pipe), in intel_crt_load_detect()
769 intel_de_write(dev_priv, VBLANK(pipe), vblank); in intel_crt_load_detect()
950 intel_de_write(dev_priv, crt->adpa_reg, adpa); in intel_crt_reset()
1008 intel_de_write(dev_priv, adpa_reg, in intel_crt_init()
[all …]
A Dintel_dpio_phy.c301 intel_de_write(dev_priv, BXT_PORT_TX_DW2_GRP(phy, ch), val); in bxt_ddi_phy_set_signal_levels()
394 intel_de_write(dev_priv, BXT_P_CR_GT_DISP_PWRON, val); in _bxt_ddi_phy_init()
416 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW9(phy), val); in _bxt_ddi_phy_init()
421 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW10(phy), val); in _bxt_ddi_phy_init()
427 intel_de_write(dev_priv, BXT_PORT_CL1CM_DW28(phy), val); in _bxt_ddi_phy_init()
432 intel_de_write(dev_priv, BXT_PORT_CL2CM_DW6(phy), val); in _bxt_ddi_phy_init()
451 intel_de_write(dev_priv, BXT_PORT_REF_DW6(phy), grc_code); in _bxt_ddi_phy_init()
455 intel_de_write(dev_priv, BXT_PORT_REF_DW8(phy), val); in _bxt_ddi_phy_init()
463 intel_de_write(dev_priv, BXT_PHY_CTL_FAMILY(phy), val); in _bxt_ddi_phy_init()
475 intel_de_write(dev_priv, BXT_PHY_CTL_FAMILY(phy), val); in bxt_ddi_phy_uninit()
[all …]
A Dintel_hdcp.c489 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
498 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
506 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
515 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
526 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
534 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
631 intel_de_write(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
774 intel_de_write(dev_priv, in intel_hdcp_auth()
857 intel_de_write(dev_priv, in intel_hdcp_auth()
946 intel_de_write(dev_priv, HDCP_REP_CTL, in _intel_hdcp_disable()
[all …]
A Dintel_hdmi.c291 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe()
306 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe()
373 intel_de_write(dev_priv, reg, val); in cpt_write_infoframe()
388 intel_de_write(dev_priv, reg, val); in cpt_write_infoframe()
448 intel_de_write(dev_priv, reg, val); in vlv_write_infoframe()
451 intel_de_write(dev_priv, in vlv_write_infoframe()
457 intel_de_write(dev_priv, in vlv_write_infoframe()
464 intel_de_write(dev_priv, reg, val); in vlv_write_infoframe()
529 intel_de_write(dev_priv, in hsw_write_infoframe()
536 intel_de_write(dev_priv, in hsw_write_infoframe()
[all …]
A Dintel_fbc.c278 intel_de_write(i915, FBC_CONTROL, fbc_ctl); in i8xx_fbc_deactivate()
296 intel_de_write(i915, FBC_TAG(i), 0); in i8xx_fbc_activate()
299 intel_de_write(i915, FBC_CONTROL2, in i8xx_fbc_activate()
301 intel_de_write(i915, FBC_FENCE_OFF, in i8xx_fbc_activate()
305 intel_de_write(i915, FBC_CONTROL, in i8xx_fbc_activate()
339 intel_de_write(i915, FBC_CFB_BASE, in i8xx_fbc_program_cfb()
341 intel_de_write(i915, FBC_LL_BASE, in i8xx_fbc_program_cfb()
415 intel_de_write(i915, DPFC_FENCE_YOFF, in g4x_fbc_activate()
418 intel_de_write(i915, DPFC_CONTROL, in g4x_fbc_activate()
431 intel_de_write(i915, DPFC_CONTROL, dpfc_ctl); in g4x_fbc_deactivate()
[all …]
A Dintel_dpll_mgr.c507 intel_de_write(dev_priv, PCH_DPLL(id), 0); in ibx_pch_dpll_disable()
1250 intel_de_write(dev_priv, DPLL_CTRL1, val); in skl_ddi_pll_write_ctrl1()
1268 intel_de_write(dev_priv, regs[id].ctl, in skl_ddi_pll_enable()
1288 intel_de_write(dev_priv, regs[id].ctl, in skl_ddi_pll_disable()
3638 intel_de_write(dev_priv, cfgcr0_reg, hw_state->cfgcr0); in icl_dpll_write()
3683 intel_de_write(dev_priv, MG_PLL_FRAC_LOCK(tc_port), in icl_mg_pll_write()
3690 intel_de_write(dev_priv, MG_PLL_BIAS(tc_port), val); in icl_mg_pll_write()
3773 intel_de_write(dev_priv, enable_reg, val); in icl_pll_power_enable()
3792 intel_de_write(dev_priv, enable_reg, val); in icl_pll_enable()
3915 intel_de_write(dev_priv, enable_reg, val); in icl_pll_disable()
[all …]
A Dintel_pch_refclk.c19 intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp); in lpt_fdi_reset_mphy()
27 intel_de_write(dev_priv, SOUTH_CHICKEN2, tmp); in lpt_fdi_reset_mphy()
115 intel_de_write(dev_priv, PIXCLK_GATE, PIXCLK_GATE_GATE); in lpt_disable_iclkip()
232 intel_de_write(dev_priv, PIXCLK_GATE, PIXCLK_GATE_UNGATE); in lpt_program_iclkip()
618 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
637 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
648 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
662 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
A Dintel_dsb.c239 intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), in intel_dsb_commit()
241 intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id), in intel_dsb_commit()
243 intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id), in intel_dsb_commit()
258 intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0); in intel_dsb_commit()
A Dintel_pps.c749 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_on_unlocked()
819 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_off_sync_unlocked()
943 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
951 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
959 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked()
1006 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_off_unlocked()
1050 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_backlight_on()
1071 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_backlight_off()
1132 intel_de_write(dev_priv, pp_on_reg, 0); in vlv_detach_power_sequencer()
1500 intel_de_write(dev_priv, regs.pp_ctrl, pp); in pps_init_registers()
[all …]
A Dg4x_dp.c148 intel_de_write(dev_priv, TRANS_DP_CTL(crtc->pipe), trans_dp); in intel_dp_prepare()
213 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on()
228 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on()
247 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_off()
429 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
433 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
453 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
457 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down()
582 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in cpt_set_link_train()
610 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in g4x_set_link_train()
[all …]
A Dintel_lvds.c216 intel_de_write(dev_priv, PP_CONTROL(0), val); in intel_lvds_pps_init_hw()
218 intel_de_write(dev_priv, PP_ON_DELAYS(0), in intel_lvds_pps_init_hw()
221 intel_de_write(dev_priv, PP_OFF_DELAYS(0), in intel_lvds_pps_init_hw()
224 intel_de_write(dev_priv, PP_DIVISOR(0), in intel_lvds_pps_init_hw()
304 intel_de_write(dev_priv, lvds_encoder->reg, temp); in intel_pre_enable_lvds()
319 intel_de_write(dev_priv, lvds_encoder->reg, in intel_enable_lvds()
322 intel_de_write(dev_priv, PP_CONTROL(0), in intel_enable_lvds()
341 intel_de_write(dev_priv, PP_CONTROL(0), in intel_disable_lvds()
347 intel_de_write(dev_priv, lvds_encoder->reg, in intel_disable_lvds()
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_suspend.c68 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf()
69 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
72 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf()
75 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
78 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf()
79 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf()
82 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf()
119 intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB); in i915_restore_display()

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