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Searched refs:ivpu_dbg (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/accel/ivpu/
A Divpu_fw.c143 ivpu_dbg(vdev, FW_BOOT, "Header version: 0x%x, format 0x%x\n", in ivpu_fw_parse()
282 ivpu_dbg(vdev, FW_BOOT, "boot_params.magic = 0x%x\n", in ivpu_fw_boot_params_print()
284 ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_id = 0x%x\n", in ivpu_fw_boot_params_print()
286 ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_count = 0x%x\n", in ivpu_fw_boot_params_print()
288 ivpu_dbg(vdev, FW_BOOT, "boot_params.frequency = %u\n", in ivpu_fw_boot_params_print()
310 ivpu_dbg(vdev, FW_BOOT, "boot_params.autoconfig = 0x%x\n", in ivpu_fw_boot_params_print()
332 ivpu_dbg(vdev, FW_BOOT, "boot_params.job_done_irq = 0x%x\n", in ivpu_fw_boot_params_print()
337 ivpu_dbg(vdev, FW_BOOT, "boot_params.si_stepping = 0x%x\n", in ivpu_fw_boot_params_print()
339 ivpu_dbg(vdev, FW_BOOT, "boot_params.device_id = 0x%llx\n", in ivpu_fw_boot_params_print()
343 ivpu_dbg(vdev, FW_BOOT, "boot_params.sku = 0x%llx\n", in ivpu_fw_boot_params_print()
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A Divpu_pm.c139 ivpu_dbg(vdev, PM, "Suspend..\n"); in ivpu_pm_suspend_cb()
160 ivpu_dbg(vdev, PM, "Suspend done.\n"); in ivpu_pm_suspend_cb()
171 ivpu_dbg(vdev, PM, "Resume..\n"); in ivpu_pm_resume_cb()
180 ivpu_dbg(vdev, PM, "Resume done.\n"); in ivpu_pm_resume_cb()
191 ivpu_dbg(vdev, PM, "Runtime suspend..\n"); in ivpu_pm_runtime_suspend_cb()
225 ivpu_dbg(vdev, PM, "Runtime resume..\n"); in ivpu_pm_runtime_resume_cb()
231 ivpu_dbg(vdev, PM, "Runtime resume done.\n"); in ivpu_pm_runtime_resume_cb()
263 ivpu_dbg(vdev, PM, "Pre-reset..\n"); in ivpu_pm_reset_prepare_cb()
268 ivpu_dbg(vdev, PM, "Pre-reset done.\n"); in ivpu_pm_reset_prepare_cb()
276 ivpu_dbg(vdev, PM, "Post-reset..\n"); in ivpu_pm_reset_done_cb()
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A Divpu_mmu.c245 ivpu_dbg(vdev, MMU, "IDR0 0x%x != IDR0_REF 0x%x\n", val, val_ref); in ivpu_mmu_config_check()
249 ivpu_dbg(vdev, MMU, "IDR1 0x%x != IDR1_REF 0x%x\n", val, IVPU_MMU_IDR1_REF); in ivpu_mmu_config_check()
264 ivpu_dbg(vdev, MMU, "IDR5 0x%x != IDR5_REF 0x%x\n", val, val_ref); in ivpu_mmu_config_check()
277 ivpu_dbg(vdev, MMU, "CDTAB alloc: dma=%pad size=%zu\n", &cdtab->dma, size); in ivpu_mmu_cdtab_alloc()
296 ivpu_dbg(vdev, MMU, "STRTAB alloc: dma=%pad dma_q=%pad size=%zu\n", in ivpu_mmu_strtab_alloc()
315 ivpu_dbg(vdev, MMU, "CMDQ alloc: dma=%pad dma_q=%pad size=%u\n", in ivpu_mmu_cmdq_alloc()
334 ivpu_dbg(vdev, MMU, "EVTQ alloc: dma=%pad dma_q=%pad size=%u\n", in ivpu_mmu_evtq_alloc()
709 ivpu_dbg(vdev, MMU, "Init..\n"); in ivpu_mmu_init()
736 ivpu_dbg(vdev, MMU, "Init done\n"); in ivpu_mmu_init()
822 ivpu_dbg(vdev, IRQ, "MMU event queue\n"); in ivpu_mmu_irq_evtq_handler()
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A Divpu_hw_reg_io.h74 ivpu_dbg(vdev, REG, "%s RD: %s (0x%08x) => 0x%08x\n", func, name, reg, val); in ivpu_hw_reg_rd32()
84 ivpu_dbg(vdev, REG, "%s RD: %s (0x%08x) => 0x%016llx\n", func, name, reg, val); in ivpu_hw_reg_rd64()
92 ivpu_dbg(vdev, REG, "%s WR: %s (0x%08x) <= 0x%08x\n", func, name, reg, val); in ivpu_hw_reg_wr32()
100 ivpu_dbg(vdev, REG, "%s WR: %s (0x%08x) <= 0x%016llx\n", func, name, reg, val); in ivpu_hw_reg_wr64()
111 ivpu_dbg(vdev, REG, "%s WR: %s_%d (0x%08x) <= 0x%08x\n", func, name, index, reg, val); in ivpu_hw_reg_wr32_index()
A Divpu_job.c190 ivpu_dbg(vdev, JOB, "Job queue full: ctx %d engine %d db %d head %d tail %d\n", in ivpu_cmdq_push_job()
256 ivpu_dbg(vdev, KREF, "Job get: id %u refcount %u\n", job->job_id, kref_read(&job->ref)); in job_get()
272 ivpu_dbg(vdev, KREF, "Job released: id %u\n", job->job_id); in job_release()
283 ivpu_dbg(vdev, KREF, "Job put: id %u refcount %u\n", job->job_id, kref_read(&job->ref)); in job_put()
317 ivpu_dbg(vdev, JOB, "Job created: ctx %2d engine %d", file_priv->ctx.id, job->engine_idx); in ivpu_create_job()
342 ivpu_dbg(vdev, JOB, "Job complete: id %3u ctx %2d engine %d status 0x%x\n", in ivpu_job_done()
403 ivpu_dbg(vdev, JOB, "Job submitted: id %3u addr 0x%llx ctx %2d engine %d next %d\n", in ivpu_direct_job_submission()
526 ivpu_dbg(vdev, JOB, "Submit ioctl: ctx %u buf_count %u\n", in ivpu_submit_ioctl()
566 ivpu_dbg(vdev, JOB, "Started %s\n", __func__); in ivpu_job_done_thread()
589 ivpu_dbg(vdev, JOB, "Stopped %s\n", __func__); in ivpu_job_done_thread()
A Divpu_drv.c60 ivpu_dbg(vdev, KREF, "file_priv get: ctx %u refcount %u\n", in ivpu_file_priv_get()
78 ivpu_dbg(vdev, KREF, "file_priv get by id: ctx %u refcount %u\n", in ivpu_file_priv_get_by_ctx_id()
89 ivpu_dbg(vdev, FILE, "file_priv release: ctx %u\n", file_priv->ctx.id); in file_priv_release()
107 ivpu_dbg(vdev, KREF, "file_priv put: ctx %u refcount %u\n", in ivpu_file_priv_put()
233 ivpu_dbg(vdev, FILE, "file_priv create: ctx %u process %s pid %d\n", in ivpu_open()
254 ivpu_dbg(vdev, FILE, "file_priv close: ctx %u process %s pid %d\n", in ivpu_postclose()
412 ivpu_dbg(vdev, MISC, "Mapping BAR0 (RegV) %pR\n", bar0); in ivpu_pci_init()
419 ivpu_dbg(vdev, MISC, "Mapping BAR4 (RegB) %pR\n", bar4); in ivpu_pci_init()
A Divpu_hw_mtl.c96 ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n", in ivpu_hw_read_platform()
208 ivpu_dbg(vdev, PM, "Skipping PLL request on %s\n", in ivpu_pll_drive()
221 ivpu_dbg(vdev, PM, "PLL workpoint request: %d Hz\n", PLL_RATIO_TO_FREQ(target_ratio)); in ivpu_pll_drive()
600 ivpu_dbg(vdev, PM, "Booting firmware, mode: %s\n", in ivpu_boot_soc_cpu_boot()
643 ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Lower\n"); in ivpu_hw_mtl_info_init()
648 ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Upper\n"); in ivpu_hw_mtl_info_init()
653 ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Both\n"); in ivpu_hw_mtl_info_init()
657 ivpu_dbg(vdev, MISC, "Tile Fuse: Disable\n"); in ivpu_hw_mtl_info_init()
958 ivpu_dbg(vdev, IRQ, "MMU sync complete\n"); in ivpu_hw_mtl_irqv_handler()
988 ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq: %08x", REGB_RD32(MTL_BUTTRESS_CURRENT_PLL)); in ivpu_hw_mtl_irqb_handler()
A Divpu_hw.h71 ivpu_dbg(vdev, PM, "HW power up\n"); in ivpu_hw_power_up()
88 ivpu_dbg(vdev, PM, "HW power down\n"); in ivpu_hw_power_down()
A Divpu_gem.c305 ivpu_dbg(vdev, BO, "remove from ctx: ctx %d vpu_addr 0x%llx allocated %d mmu_mapped %d\n", in ivpu_bo_free_vpu_addr()
405 ivpu_dbg(vdev, BO, "free: ctx %d vpu_addr 0x%llx allocated %d mmu_mapped %d\n", in ivpu_bo_free()
408 ivpu_dbg(vdev, BO, "free: ctx (released) allocated %d mmu_mapped %d\n", in ivpu_bo_free()
435 ivpu_dbg(vdev, BO, "mmap: ctx %u handle %u vpu_addr 0x%llx size %zu type %s", in ivpu_bo_mmap()
550 ivpu_dbg(vdev, BO, "alloc shmem: ctx %u vpu_addr 0x%llx size %zu flags 0x%x\n", in ivpu_bo_create_ioctl()
597 ivpu_dbg(vdev, BO, "alloc internal: ctx 0 vpu_addr 0x%llx size %zu flags 0x%x\n", in ivpu_bo_alloc_internal()
A Divpu_jsm_msg.c29 ivpu_dbg(vdev, JSM, "Doorbell %d registered to context %d\n", db_id, ctx_id); in ivpu_jsm_register_db()
49 ivpu_dbg(vdev, JSM, "Doorbell %d unregistered\n", db_id); in ivpu_jsm_unregister_db()
A Divpu_ipc.c36 ivpu_dbg(vdev, IPC, in ivpu_ipc_msg_dump()
47 ivpu_dbg(vdev, JSM, in ivpu_jsm_msg_dump()
243 ivpu_dbg(vdev, IPC, "IPC resp result error: %d\n", rx_msg->jsm_msg->result); in ivpu_ipc_receive()
420 ivpu_dbg(vdev, IPC, "IPC RX msg 0x%x dropped (no consumer)\n", vpu_addr); in ivpu_ipc_irq_handler()
A Divpu_drv.h63 #define ivpu_dbg(vdev, type, fmt, args...) do { \ macro

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