Searched refs:lane0 (Results 1 – 12 of 12) sorted by relevance
| /linux-6.3-rc2/Documentation/devicetree/bindings/mfd/ |
| A D | ti,j721e-system-controller.yaml | 89 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
90 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
91 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
92 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
94 /* SERDES4 lane0/1/2/3 select */
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| /linux-6.3-rc2/Documentation/devicetree/bindings/display/bridge/ |
| A D | analogix,anx7625.yaml | 46 analogix,lane0-swing:
51 an array of swing register setting for DP tx lane0 PHY.
79 DP TX lane1 swing register setting same with lane0
80 swing, please refer lane0-swing property description.
150 analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
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| /linux-6.3-rc2/Documentation/devicetree/bindings/pci/ |
| A D | pci-armada8k.txt | 25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
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| /linux-6.3-rc2/Documentation/devicetree/bindings/phy/ |
| A D | qcom,msm8996-qmp-pcie-phy.yaml | 87 - lane0
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/include/ |
| A D | grph_object_ctrl_defs.h | 242 uint8_t lane0:2; /* Mapping for lane 0 */ member
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| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3568.dtsi | 155 /* bifurcation; lane0 when using 1+1 */
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| /linux-6.3-rc2/arch/arm64/boot/dts/marvell/ |
| A D | armada-8040-mcbin.dtsi | 188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
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| A D | armada-8040-puzzle-m801.dts | 521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
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| /linux-6.3-rc2/arch/arm64/boot/dts/ti/ |
| A D | k3-j721e-main.dtsi | 50 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
51 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
52 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
53 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
55 /* SERDES4 lane0/1/2/3 select */
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| A D | k3-j7200-main.dtsi | 38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
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| A D | k3-am64-main.dtsi | 50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
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| /linux-6.3-rc2/arch/arm64/boot/dts/qcom/ |
| A D | msm8996.dtsi | 640 reset-names = "lane0";
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