Searched refs:lane_width (Results 1 – 13 of 13) sorted by relevance
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
A D | hwmgr_ppt.h | 97 uint8_t lane_width; member
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A D | vega10_hwmgr.c | 4738 (lane_width == 1) ? "x1" : in vega10_emit_clock_levels() 4739 (lane_width == 2) ? "x2" : in vega10_emit_clock_levels() 4740 (lane_width == 3) ? "x4" : in vega10_emit_clock_levels() 4741 (lane_width == 4) ? "x8" : in vega10_emit_clock_levels() 4742 (lane_width == 5) ? "x12" : in vega10_emit_clock_levels() 4743 (lane_width == 6) ? "x16" : "", in vega10_emit_clock_levels() 4874 (lane_width == 1) ? "x1" : in vega10_print_clock_levels() 4875 (lane_width == 2) ? "x2" : in vega10_print_clock_levels() 4876 (lane_width == 3) ? "x4" : in vega10_print_clock_levels() 4877 (lane_width == 4) ? "x8" : in vega10_print_clock_levels() [all …]
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A D | vega20_hwmgr.c | 3361 uint32_t gen_speed, lane_width, current_gen_speed, current_lane_width; in vega20_print_clock_levels() local 3455 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels() 3462 (lane_width == 1) ? "x1" : in vega20_print_clock_levels() 3463 (lane_width == 2) ? "x2" : in vega20_print_clock_levels() 3464 (lane_width == 3) ? "x4" : in vega20_print_clock_levels() 3465 (lane_width == 4) ? "x8" : in vega20_print_clock_levels() 3466 (lane_width == 5) ? "x12" : in vega20_print_clock_levels() 3467 (lane_width == 6) ? "x16" : "", in vega20_print_clock_levels() 3470 (current_lane_width == lane_width) ? in vega20_print_clock_levels()
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A D | process_pptables_v1_0.c | 519 pcie_record->lane_width = le16_to_cpu(atom_pcie_record->usPCIELaneWidth); in get_pcie_table() 557 pcie_record->lane_width = le16_to_cpu(atom_pcie_record->usPCIELaneWidth); in get_pcie_table()
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A D | vega10_processpptables.c | 815 pcie_table->entries[i].lane_width = in get_pcie_table()
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A D | smu7_hwmgr.c | 677 pcie_table->entries[i].lane_width)); in smu7_setup_default_pcie_table()
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/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
A D | arcturus_ppt.c | 769 uint32_t gen_speed, lane_width; in arcturus_print_clk_levels() local 925 lane_width = smu_v11_0_get_current_pcie_link_width_level(smu); in arcturus_print_clk_levels() 931 (lane_width == 1) ? "x1" : in arcturus_print_clk_levels() 932 (lane_width == 2) ? "x2" : in arcturus_print_clk_levels() 933 (lane_width == 3) ? "x4" : in arcturus_print_clk_levels() 934 (lane_width == 4) ? "x8" : in arcturus_print_clk_levels() 935 (lane_width == 5) ? "x12" : in arcturus_print_clk_levels() 936 (lane_width == 6) ? "x16" : "", in arcturus_print_clk_levels()
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A D | navi10_ppt.c | 1265 uint32_t gen_speed, lane_width; in navi10_emit_clk_levels() local 1336 lane_width = smu_v11_0_get_current_pcie_link_width_level(smu); in navi10_emit_clk_levels() 1351 (lane_width == dpm_context->dpm_tables.pcie_table.pcie_lane[i]) ? in navi10_emit_clk_levels() 1472 uint32_t gen_speed, lane_width; in navi10_print_clk_levels() local 1536 lane_width = smu_v11_0_get_current_pcie_link_width_level(smu); in navi10_print_clk_levels() 1551 (lane_width == dpm_context->dpm_tables.pcie_table.pcie_lane[i]) ? in navi10_print_clk_levels()
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A D | sienna_cichlid_ppt.c | 1266 uint32_t gen_speed, lane_width; in sienna_cichlid_print_clk_levels() local 1328 lane_width = smu_v11_0_get_current_pcie_link_width_level(smu); in sienna_cichlid_print_clk_levels() 1344 (lane_width == dpm_context->dpm_tables.pcie_table.pcie_lane[i]) ? in sienna_cichlid_print_clk_levels()
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/linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
A D | smu_v13_0_7_ppt.c | 964 uint32_t gen_speed, lane_width; in smu_v13_0_7_print_clk_levels() local 1059 &lane_width); in smu_v13_0_7_print_clk_levels() 1078 (lane_width == pcie_table->pcie_lane[i]) ? in smu_v13_0_7_print_clk_levels()
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A D | smu_v13_0_0_ppt.c | 1034 uint32_t gen_speed, lane_width; in smu_v13_0_0_print_clk_levels() local 1129 &lane_width); in smu_v13_0_0_print_clk_levels() 1148 (lane_width == link_width[pcie_table->pcie_lane[i]]) ? in smu_v13_0_0_print_clk_levels()
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/linux-6.3-rc2/drivers/gpu/drm/radeon/ |
A D | si_dpm.c | 4681 u32 lane_width; in si_init_smc_table() local 4752 lane_width = radeon_get_pcie_lanes(rdev); in si_init_smc_table() 4753 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table() 5898 u32 lane_width; in si_set_pcie_lane_width_in_smc() local 5906 lane_width = radeon_get_pcie_lanes(rdev); in si_set_pcie_lane_width_in_smc() 5907 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()
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/linux-6.3-rc2/drivers/gpu/drm/amd/pm/legacy-dpm/ |
A D | si_dpm.c | 5183 u32 lane_width; in si_init_smc_table() local 5254 lane_width = amdgpu_get_pcie_lanes(adev); in si_init_smc_table() 5255 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table() 6395 u32 lane_width; in si_set_pcie_lane_width_in_smc() local 6403 lane_width = amdgpu_get_pcie_lanes(adev); in si_set_pcie_lane_width_in_smc() 6404 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()
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