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Searched refs:link_res (Results 1 – 25 of 44) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/hwss/
A Dlink_hwss_hpo_dp.c55 pipe_ctx->link_res.hpo_dp_link_enc; in set_hpo_dp_throttled_vcp_size()
122 const struct link_resource *link_res, in enable_hpo_dp_fpga_link_output() argument
141 link_res->hpo_dp_link_enc->inst, in enable_hpo_dp_fpga_link_output()
144 link_res->hpo_dp_link_enc, in enable_hpo_dp_fpga_link_output()
150 const struct link_resource *link_res, in enable_hpo_dp_link_output() argument
160 link_res->hpo_dp_link_enc, in enable_hpo_dp_link_output()
173 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); in disable_hpo_dp_fpga_link_output()
176 link_res->hpo_dp_link_enc->inst); in disable_hpo_dp_fpga_link_output()
192 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); in disable_hpo_dp_link_output()
213 link_res->hpo_dp_link_enc, in set_hpo_dp_lane_settings()
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A Dlink_hwss_dio.h33 const struct link_resource *link_res);
40 const struct link_resource *link_res,
45 const struct link_resource *link_res,
48 const struct link_resource *link_res,
51 const struct link_resource *link_res,
A Dlink_hwss_dio.c112 const struct link_resource *link_res, in enable_dio_dp_link_output() argument
133 const struct link_resource *link_res, in disable_dio_link_output() argument
143 const struct link_resource *link_res, in set_dio_dp_link_test_pattern() argument
153 const struct link_resource *link_res, in set_dio_dp_lane_settings() argument
163 const struct link_resource *link_res, in update_dio_stream_allocation_table() argument
239 const struct link_resource *link_res) in can_use_dio_link_hwss() argument
A Dlink_hwss_dpia.c33 const struct link_resource *link_res, in update_dpia_stream_allocation_table() argument
73 const struct link_resource *link_res) in can_use_dpia_link_hwss() argument
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_training_auxless.c35 const struct link_resource *link_res, in dc_link_dp_perform_link_training_skip_aux() argument
52 dp_set_hw_training_pattern(link, link_res, lt_settings.pattern_for_cr, DPRX); in dc_link_dp_perform_link_training_skip_aux()
55 dp_set_hw_lane_settings(link, link_res, &lt_settings, DPRX); in dc_link_dp_perform_link_training_skip_aux()
63 dp_set_hw_training_pattern(link, link_res, lt_settings.pattern_for_eq, DPRX); in dc_link_dp_perform_link_training_skip_aux()
66 dp_set_hw_lane_settings(link, link_res, &lt_settings, DPRX); in dc_link_dp_perform_link_training_skip_aux()
74 dp_set_hw_test_pattern(link, link_res, DP_TEST_PATTERN_VIDEO_MODE, NULL, 0); in dc_link_dp_perform_link_training_skip_aux()
A Dlink_dp_phy.c59 const struct link_resource *link_res, in dp_enable_link_phy() argument
65 link->dc->hwss.enable_dp_link_output(link, link_res, signal, in dp_enable_link_phy()
71 const struct link_resource *link_res, in dp_disable_link_phy() argument
79 dc->hwss.disable_link_output(link, link_res, signal); in dp_disable_link_phy()
96 const struct link_resource *link_res, in dp_set_hw_lane_settings() argument
100 const struct link_hwss *link_hwss = get_link_hwss(link, link_res); in dp_set_hw_lane_settings()
107 link_hwss->ext.set_dp_lane_settings(link, link_res, in dp_set_hw_lane_settings()
118 const struct link_resource *link_res, in dp_set_drive_settings() argument
122 dp_set_hw_lane_settings(link, link_res, lt_settings, DPRX); in dp_set_drive_settings()
132 enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool re… in dp_set_fec_ready() argument
A Dlink_dp_phy.h32 const struct link_resource *link_res,
38 const struct link_resource *link_res,
43 const struct link_resource *link_res,
49 const struct link_resource *link_res,
53 const struct link_resource *link_res, bool ready);
A Dlink_dp_training_128b_132b.c73 const struct link_resource *link_res, in dp_perform_128b_132b_channel_eq_done_sequence() argument
86 dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
97 dp_set_hw_lane_settings(link, link_res, lt_settings, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
98 dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_eq, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
127 dp_set_hw_lane_settings(link, link_res, lt_settings, DPRX); in dp_perform_128b_132b_channel_eq_done_sequence()
158 const struct link_resource *link_res, in dp_perform_128b_132b_cds_done_sequence() argument
197 const struct link_resource *link_res, in dp_perform_128b_132b_link_training() argument
209 return dp_perform_8b_10b_link_training(link, link_res, &legacy_settings); in dp_perform_128b_132b_link_training()
215 result = dp_perform_128b_132b_channel_eq_done_sequence(link, link_res, lt_settings); in dp_perform_128b_132b_link_training()
218 result = dp_perform_128b_132b_cds_done_sequence(link, link_res, lt_settings); in dp_perform_128b_132b_link_training()
A Dlink_dp_training_8b_10b.c156 const struct link_resource *link_res, in perform_8b_10b_clock_recovery_sequence() argument
176 dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, offset); in perform_8b_10b_clock_recovery_sequence()
190 link_res, in perform_8b_10b_clock_recovery_sequence()
270 const struct link_resource *link_res, in perform_8b_10b_channel_equalization_sequence() argument
288 dp_set_hw_training_pattern(link, link_res, tr_pattern, offset); in perform_8b_10b_channel_equalization_sequence()
293 dp_set_hw_lane_settings(link, link_res, lt_settings, offset); in perform_8b_10b_channel_equalization_sequence()
354 const struct link_resource *link_res, in dp_perform_8b_10b_link_training() argument
364 start_clock_recovery_pattern_early(link, link_res, lt_settings, DPRX); in dp_perform_8b_10b_link_training()
386 link_res, in dp_perform_8b_10b_link_training()
404 status = perform_8b_10b_clock_recovery_sequence(link, link_res, lt_settings, DPRX); in dp_perform_8b_10b_link_training()
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A Dlink_dp_training_fixed_vs_pe_retimer.c138 const struct link_resource *link_res, in perform_fixed_vs_pe_nontransparent_training_sequence() argument
162 start_clock_recovery_pattern_early(link, link_res, lt_settings, DPRX); in perform_fixed_vs_pe_nontransparent_training_sequence()
187 status = perform_8b_10b_clock_recovery_sequence(link, link_res, lt_settings, repeater_id); in perform_fixed_vs_pe_nontransparent_training_sequence()
195 link_res, in perform_fixed_vs_pe_nontransparent_training_sequence()
213 status = perform_8b_10b_clock_recovery_sequence(link, link_res, lt_settings, DPRX); in perform_fixed_vs_pe_nontransparent_training_sequence()
216 link_res, in perform_fixed_vs_pe_nontransparent_training_sequence()
228 const struct link_resource *link_res, in dp_perform_fixed_vs_pe_training_sequence() argument
252 status = perform_fixed_vs_pe_nontransparent_training_sequence(link, link_res, lt_settings); in dp_perform_fixed_vs_pe_training_sequence()
367 link_res, in dp_perform_fixed_vs_pe_training_sequence()
496 dp_set_hw_training_pattern(link, link_res, tr_pattern, 0); in dp_perform_fixed_vs_pe_training_sequence()
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A Dlink_dp_training_dpia.c103 const struct link_resource *link_res, in dpia_configure_link() argument
140 status = dp_set_fec_ready(link, link_res, fec_enable); in dpia_configure_link()
289 const struct link_resource *link_res, in dpia_training_cr_non_transparent() argument
460 const struct link_resource *link_res, in dpia_training_cr_transparent() argument
562 const struct link_resource *link_res, in dpia_training_cr_phase() argument
571 result = dpia_training_cr_transparent(link, link_res, lt_settings); in dpia_training_cr_phase()
612 const struct link_resource *link_res, in dpia_training_eq_non_transparent() argument
762 const struct link_resource *link_res, in dpia_training_eq_transparent() argument
847 const struct link_resource *link_res, in dpia_training_eq_phase() argument
856 result = dpia_training_eq_transparent(link, link_res, lt_settings); in dpia_training_eq_phase()
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A Dlink_dp_training_8b_10b.h39 const struct link_resource *link_res,
44 const struct link_resource *link_res,
50 const struct link_resource *link_res,
A Dlink_dp_training.c1264 const struct link_resource *link_res, in start_clock_recovery_pattern_early() argument
1277 const struct link_resource *link_res, in dp_set_hw_test_pattern() argument
1296 const struct link_resource *link_res, in dp_set_hw_training_pattern() argument
1332 const struct link_resource *link_res, in perform_post_lt_adj_req_sequence() argument
1394 link_res, in perform_post_lt_adj_req_sequence()
1420 const struct link_resource *link_res, in dp_transition_to_video_idle() argument
1465 const struct link_resource *link_res, in dp_perform_link_training() argument
1512 link_res, in dp_perform_link_training()
1565 &pipe_ctx->link_res, in perform_link_training_with_retries()
1602 &pipe_ctx->link_res, in perform_link_training_with_retries()
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A Dlink_dp_training.h41 const struct link_resource *link_res,
47 const struct link_resource *link_res,
53 const struct link_resource *link_res,
101 const struct link_resource *link_res,
/linux-6.3-rc2/drivers/soundwire/
A Dintel.c106 void __iomem *s = sdw->link_res->shim; in intel_reg_show()
107 void __iomem *a = sdw->link_res->alh; in intel_reg_show()
328 shim = sdw->link_res->shim; in intel_shim_check_wake()
340 mutex_lock(sdw->link_res->shim_lock); in intel_shim_wake()
357 mutex_unlock(sdw->link_res->shim_lock); in intel_shim_wake()
373 mutex_lock(sdw->link_res->shim_lock); in intel_link_power_up()
437 mutex_unlock(sdw->link_res->shim_lock); in intel_link_power_up()
450 mutex_lock(sdw->link_res->shim_lock); in intel_link_power_down()
496 mutex_lock(sdw->link_res->shim_lock); in intel_shim_sync_arm()
535 mutex_lock(sdw->link_res->shim_lock); in intel_shim_sync_go()
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A Dintel.h46 struct sdw_intel_link_res *link_res; member
57 #define SDW_INTEL_CHECK_OPS(sdw, cb) ((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \
58 (sdw)->link_res->hw_ops->cb)
59 #define SDW_INTEL_OPS(sdw, cb) ((sdw)->link_res->hw_ops->cb)
A Dintel_auxdevice.c52 return sdw->link_res->hw_ops->pre_bank_switch(sdw); in generic_pre_bank_switch()
60 return sdw->link_res->hw_ops->post_bank_switch(sdw); in generic_post_bank_switch()
144 sdw->link_res = &ldev->link_res; in intel_link_probe()
146 cdns->registers = sdw->link_res->registers; in intel_link_probe()
252 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_link_startup()
381 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_pm_prepare()
444 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_suspend()
486 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_suspend_runtime()
593 clock_stop_quirks = sdw->link_res->clock_stop_quirks; in intel_resume_runtime()
A Dintel_init.c63 link = &ldev->link_res; in intel_link_dev_register()
121 if (!ldev->link_res.clock_stop_quirks) in sdw_intel_cleanup()
122 pm_runtime_put_noidle(ldev->link_res.dev); in sdw_intel_cleanup()
224 link = &ldev->link_res; in sdw_intel_probe_controller()
297 if (!ldev->link_res.clock_stop_quirks) { in sdw_intel_startup_controller()
304 pm_runtime_get_noresume(ldev->link_res.dev); in sdw_intel_startup_controller()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/
A Dlink_hwss.h55 const struct link_resource *link_res,
60 const struct link_resource *link_res,
63 const struct link_resource *link_res,
67 const struct link_resource *link_res,
81 const struct link_resource *link_res,
A Dhw_sequencer.h218 const struct link_resource *link_res,
223 const struct link_resource *link_res,
229 const struct link_resource *link_res,
233 const struct link_resource *link_res,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/
A Dlink_resource.c33 struct link_resource *link_res) in link_get_cur_link_res() argument
38 memset(link_res, 0, sizeof(*link_res)); in link_get_cur_link_res()
44 *link_res = pipe->link_res; in link_get_cur_link_res()
A Dlink_hwss_hpo_frl.c54 const struct link_resource *link_res) in can_use_hpo_frl_link_hwss() argument
56 return link_res->hpo_frl_link_enc != NULL; in can_use_hpo_frl_link_hwss()
A Dlink_dpms.c151 struct link_resource link_res = {0}; in link_set_all_streams_dpms_off_for_link() local
168 dp_disable_link_phy(link, &link_res, link->connector_signal); in link_set_all_streams_dpms_off_for_link()
1496 &pipe_ctx->link_res, in allocate_mst_payload()
1918 const struct link_resource *link_res, in disable_link_dp() argument
1928 dp_disable_link_phy(link, link_res, signal); in disable_link_dp()
1937 dp_set_fec_ready(link, link_res, false); in disable_link_dp()
1942 const struct link_resource *link_res, in disable_link() argument
1946 disable_link_dp(link, link_res, signal); in disable_link()
2012 &pipe_ctx->link_res, in enable_link_hdmi()
2146 &pipe_ctx->link_res, in enable_link_lvds()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_hw_sequencer.h94 const struct link_resource *link_res,
97 const struct link_resource *link_res,
101 const struct link_resource *link_res,
108 const struct link_resource *link_res,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/accessories/
A Dlink_fpga.c43 const struct link_hwss *link_hwss = get_link_hwss(stream->link, &pipe_ctx->link_res); in dp_fpga_hpo_enable_link_and_stream()
49 link_hwss->ext.enable_dp_link_output(stream->link, &pipe_ctx->link_res, in dp_fpga_hpo_enable_link_and_stream()
86 &pipe_ctx->link_res, in dp_fpga_hpo_enable_link_and_stream()

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