Searched refs:lvds_pll_cntl (Results 1 – 3 of 3) sorted by relevance
98 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); in radeon_legacy_lvds_update()99 lvds_pll_cntl |= RADEON_LVDS_PLL_EN; in radeon_legacy_lvds_update()100 WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in radeon_legacy_lvds_update()103 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); in radeon_legacy_lvds_update()104 lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; in radeon_legacy_lvds_update()105 WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); in radeon_legacy_lvds_update()199 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; in radeon_legacy_lvds_mode_set()228 lvds_pll_cntl &= ~(R300_LVDS_SRC_SEL_MASK); in radeon_legacy_lvds_mode_set()233 lvds_pll_cntl |= R300_LVDS_SRC_SEL_RMX; in radeon_legacy_lvds_mode_set()238 lvds_pll_cntl |= R300_LVDS_SRC_SEL_CRTC2; in radeon_legacy_lvds_mode_set()[all …]
226 u32 lvds_pll_cntl; member
1334 save->lvds_pll_cntl = INREG(LVDS_PLL_CNTL); in radeon_save_state()1895 newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl; in radeonfb_set_par()
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