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Searched refs:masks (Results 1 – 25 of 249) sorted by relevance

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/linux-6.3-rc2/drivers/clk/mmp/
A Dclk-frac.c54 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
61 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
64 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
131 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_init()
134 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_init()
141 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_init()
145 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_init()
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/linux-6.3-rc2/drivers/clk/spear/
A Dclk-aux-synth.c77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
116 aux->masks->xscale_sel_shift; in clk_aux_set_rate()
117 val &= ~(aux->masks->yscale_sel_mask << aux->masks->yscale_sel_shift); in clk_aux_set_rate()
119 aux->masks->yscale_sel_shift; in clk_aux_set_rate()
153 if (!masks) in clk_register_aux()
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/linux-6.3-rc2/lib/
A Dgroup_cpus.c51 if (!masks) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
64 kfree(masks); in alloc_node_to_cpumask()
74 kfree(masks); in free_node_to_cpumask()
273 cpumask_or(&masks[curgrp], &masks[curgrp], nmsk); in __group_cpus_evenly()
365 masks = kcalloc(numgrps, sizeof(*masks), GFP_KERNEL); in group_cpus_evenly()
366 if (!masks) in group_cpus_evenly()
411 kfree(masks); in group_cpus_evenly()
414 return masks; in group_cpus_evenly()
421 if (!masks) in group_cpus_evenly()
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/linux-6.3-rc2/kernel/irq/
A Daffinity.c29 struct irq_affinity_desc *masks = NULL; in irq_create_affinity_masks() local
59 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in irq_create_affinity_masks()
60 if (!masks) in irq_create_affinity_masks()
65 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
77 kfree(masks); in irq_create_affinity_masks()
82 cpumask_copy(&masks[curvec + j].mask, &result[j]); in irq_create_affinity_masks()
95 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
99 masks[i].is_managed = 1; in irq_create_affinity_masks()
101 return masks; in irq_create_affinity_masks()
/linux-6.3-rc2/drivers/net/dsa/microchip/
A Dksz8795.c165 const u32 *masks; in ksz8_r_mib_cnt() local
172 masks = dev->info->masks; in ksz8_r_mib_cnt()
208 masks = dev->info->masks; in ksz8795_r_mib_pkt()
375 masks = dev->info->masks; in ksz8_valid_dyn_entry()
409 masks = dev->info->masks; in ksz8_r_dyn_mac_table()
469 masks = dev->info->masks; in ksz8_r_sta_mac_table()
507 masks = dev->info->masks; in ksz8_w_sta_mac_table()
537 masks = dev->info->masks; in ksz8_from_vlan()
552 masks = dev->info->masks; in ksz8_to_vlan()
1245 masks = dev->info->masks; in ksz8_port_setup()
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/linux-6.3-rc2/block/
A Dblk-mq-cpumap.c21 const struct cpumask *masks; in blk_mq_map_queues() local
24 masks = group_cpus_evenly(qmap->nr_queues); in blk_mq_map_queues()
25 if (!masks) { in blk_mq_map_queues()
32 for_each_cpu(cpu, &masks[queue]) in blk_mq_map_queues()
35 kfree(masks); in blk_mq_map_queues()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_dpp_cm.c119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
214 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
216 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
270 reg->masks.field_region_end = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
274 reg->masks.field_region_end_base = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_BASE_B; in dpp1_cm_get_reg_field()
278 reg->masks.exp_region_start = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_START_B; in dpp1_cm_get_reg_field()
297 reg->masks.field_region_end = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_degamma_reg_field()
305 reg->masks.exp_region_start = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_START_B; in dpp1_cm_get_degamma_reg_field()
470 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_ICSC_C11; in dpp1_program_input_csc()
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/linux-6.3-rc2/arch/riscv/mm/
A Dpageattr.c19 struct pageattr_masks *masks = walk->private; in set_pageattr_masks() local
22 new_val &= ~(pgprot_val(masks->clear_mask)); in set_pageattr_masks()
23 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
113 struct pageattr_masks masks = { in __set_memory() local
123 &masks); in __set_memory()
164 struct pageattr_masks masks = { in set_direct_map_invalid_noflush() local
170 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_invalid_noflush()
181 struct pageattr_masks masks = { in set_direct_map_default_noflush() local
187 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_default_noflush()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_i2c_hw.c86 else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE) in get_channel_status()
624 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
631 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
647 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
654 masks); in dce100_i2c_hw_construct()
664 const struct dce_i2c_mask *masks) in dce112_i2c_hw_construct() argument
671 masks); in dce112_i2c_hw_construct()
681 const struct dce_i2c_mask *masks) in dcn1_i2c_hw_construct() argument
688 masks); in dcn1_i2c_hw_construct()
698 const struct dce_i2c_mask *masks) in dcn2_i2c_hw_construct() argument
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A Ddce_i2c_hw.h292 const struct dce_i2c_mask *masks; member
301 const struct dce_i2c_mask *masks);
309 const struct dce_i2c_mask *masks);
317 const struct dce_i2c_mask *masks);
325 const struct dce_i2c_mask *masks);
333 const struct dce_i2c_mask *masks);
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_dwb_cm.c53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
75 reg->masks.exp_region_start = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_B; in dwb3_get_reg_field_ogam()
316 gam_regs.masks.csc_c11 = dwbc30->dwbc_mask->DWB_GAMUT_REMAPA_C11; in dwb3_program_gamut_remap()
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A Ddcn30_dpp_cm.c177 reg->masks.field_region_start_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_BASE_B; in dpp3_gamcor_reg_field()
179 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
182 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
184 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
186 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
191 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
193 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
195 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
199 reg->masks.exp_region_start = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_B; in dpp3_gamcor_reg_field()
345 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
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/linux-6.3-rc2/drivers/clk/uniphier/
A Dclk-uniphier-mux.c17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
/linux-6.3-rc2/drivers/net/ethernet/intel/ice/
A Dice_flex_pipe.c1176 if (hw->blk[blk].masks.masks[i].in_use && in ice_prof_has_mask_idx()
1479 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks)); in ice_init_prof_masks()
1520 if (hw->blk[blk].masks.masks[i].in_use) { in ice_alloc_prof_mask()
1550 hw->blk[blk].masks.masks[i].mask = mask; in ice_alloc_prof_mask()
1551 hw->blk[blk].masks.masks[i].idx = idx; in ice_alloc_prof_mask()
1552 hw->blk[blk].masks.masks[i].ref = 0; in ice_alloc_prof_mask()
1556 hw->blk[blk].masks.masks[i].ref++; in ice_alloc_prof_mask()
1588 hw->blk[blk].masks.masks[mask_idx].ref--; in ice_free_prof_mask()
1649 hw->blk[blk].masks.masks[i].idx = 0; in ice_shutdown_prof_masks()
1650 hw->blk[blk].masks.masks[i].mask = 0; in ice_shutdown_prof_masks()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_mpc.c165 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_output_csc()
167 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_output_csc()
223 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
225 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
251 reg->masks.exp_region0_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
253 reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
255 reg->masks.exp_region1_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
259 reg->masks.field_region_end = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
261 reg->masks.field_region_end_slope = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
263 reg->masks.field_region_end_base = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_BASE_B; in mpc2_ogam_get_reg_field()
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/linux-6.3-rc2/Documentation/devicetree/bindings/usb/
A Dbrcm,usb-pinmap.yaml33 brcm,in-masks:
45 brcm,out-masks:
47 description: Array of enable, value, changed and clear masks, one
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
/linux-6.3-rc2/drivers/s390/char/
A Dsclp.h98 u8 masks[4 * 1021]; /* variable length */ member
109 static inline sccb_mask_t sccb_get_mask(u8 *masks, size_t len, int i) in sccb_get_mask() argument
113 memcpy(&res, masks + i * len, min(sizeof(res), len)); in sccb_get_mask()
117 static inline void sccb_set_mask(u8 *masks, size_t len, int i, sccb_mask_t val) in sccb_set_mask() argument
119 memset(masks + i * len, 0, len); in sccb_set_mask()
120 memcpy(masks + i * len, &val, min(sizeof(val), len)); in sccb_set_mask()
127 sccb_get_mask(__sccb->masks, __sccb->mask_length, i); \
138 sccb_set_mask(__sccb->masks, __sccb->mask_length, i, val); \
/linux-6.3-rc2/Documentation/devicetree/bindings/sound/
A Dtdm-slot.txt20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
/linux-6.3-rc2/kernel/sched/
A Dtopology.c1878 if (!masks) in sched_init_numa()
1887 if (!masks[i]) in sched_init_numa()
1897 masks[i][j] = mask; in sched_init_numa()
1977 if (!masks[i]) in sched_reset_numa()
1981 kfree(masks[i]); in sched_reset_numa()
1983 kfree(masks); in sched_reset_numa()
2055 if (!masks) in sched_numa_find_closest()
2058 if (!masks[i][j]) in sched_numa_find_closest()
2088 if (b == k->masks) { in hop_cmp()
2118 if (!k.masks) in sched_numa_find_nth_cpu()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_hubbub.c38 hubbub1->shifts->field_name, hubbub1->masks->field_name
48 hubbub1->shifts->field_name, hubbub1->masks->field_name
79 hubbub3->masks = hubbub_mask; in hubbub301_construct()
/linux-6.3-rc2/drivers/pci/msi/
A Dmsi.c282 struct irq_affinity_desc *masks) in msi_setup_msi_desc() argument
304 desc.affinity = masks; in msi_setup_msi_desc()
350 struct irq_affinity_desc *masks = NULL; in msi_capability_init() local
366 masks = irq_create_affinity_masks(nvec, affd); in msi_capability_init()
369 ret = msi_setup_msi_desc(dev, nvec, masks); in msi_capability_init()
401 kfree(masks); in msi_capability_init()
608 int nvec, struct irq_affinity_desc *masks) in msix_setup_msi_descs() argument
618 desc.affinity = masks ? curmsk : NULL; in msix_setup_msi_descs()
657 struct irq_affinity_desc *masks = NULL; in msix_setup_interrupts() local
661 masks = irq_create_affinity_masks(nvec, affd); in msix_setup_interrupts()
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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_hubbub.c41 hubbub1->shifts->field_name, hubbub1->masks->field_name
51 hubbub1->shifts->field_name, hubbub1->masks->field_name
103 hubbub->masks = hubbub_mask; in hubbub201_construct()
/linux-6.3-rc2/tools/perf/trace/beauty/
A Dprctl.c65 const u8 masks[] = { in syscall_arg__scnprintf_prctl_option() local
78 if (option < ARRAY_SIZE(masks)) in syscall_arg__scnprintf_prctl_option()
79 arg->mask |= masks[option]; in syscall_arg__scnprintf_prctl_option()
/linux-6.3-rc2/Documentation/devicetree/bindings/mux/
A Dreg-mux.yaml27 mux-reg-masks:
39 - mux-reg-masks
53 mux-reg-masks =
109 mux-reg-masks =
/linux-6.3-rc2/net/openvswitch/
A Dflow_table.c262 if (ovsl_dereference(old->masks[i])) in tbl_mask_array_realloc()
263 new->masks[new->count++] = old->masks[i]; in tbl_mask_array_realloc()
295 rcu_assign_pointer(ma->masks[ma_count], new); in tbl_mask_array_add_mask()
309 if (mask == ovsl_dereference(ma->masks[i])) in tbl_mask_array_del_mask()
319 rcu_assign_pointer(ma->masks[i], ma->masks[ma_count - 1]); in tbl_mask_array_del_mask()
762 mask = rcu_dereference_ovsl(ma->masks[i]); in flow_lookup()
883 mask = ovsl_dereference(ma->masks[i]); in ovs_flow_tbl_lookup_exact()
999 t = ovsl_dereference(ma->masks[i]); in flow_mask_find()
1126 mask = rcu_dereference_ovsl(ma->masks[i]); in ovs_flow_masks_rebalance()
1180 if (ovsl_dereference(ma->masks[index])) in ovs_flow_masks_rebalance()
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