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Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/radeon/
A Dbtc_dpm.c1281 max_limits->sclk, in btc_adjust_clock_combinations()
1288 max_limits->mclk, in btc_adjust_clock_combinations()
2133 ps->low.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()
2135 ps->low.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
2137 ps->low.vddc = max_limits->vddc; in btc_apply_state_adjust_rules()
2162 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2198 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2200 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in btc_apply_state_adjust_rules()
2234 btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, in btc_apply_state_adjust_rules()
2236 btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, in btc_apply_state_adjust_rules()
[all …]
A Dbtc_dpm.h48 const struct radeon_clock_and_voltage_limits *max_limits,
A Dni_dpm.c789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
815 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()
829 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
864 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
869 btc_adjust_clock_combinations(rdev, max_limits, in ni_apply_state_adjust_rules()
[all …]
A Dci_dpm.c775 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local
800 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()
806 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
807 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
808 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()
809 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()
3895 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local
3944 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_vce_dpm() local
3977 const struct radeon_clock_and_voltage_limits *max_limits;
[all …]
A Dsi_dpm.c2950 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3017 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3018 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3019 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3020 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3021 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
3022 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3023 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3024 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3129 btc_adjust_clock_combinations(rdev, max_limits, in si_apply_state_adjust_rules()
[all …]
A Dkv_dpm.c1948 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
1959 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
1963 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2082 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2084 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/legacy-dpm/
A Dsi_dpm.c3296 max_limits->sclk, in btc_adjust_clock_combinations()
3303 max_limits->mclk, in btc_adjust_clock_combinations()
3426 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3490 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3491 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3492 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3493 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3495 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3497 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3602 btc_adjust_clock_combinations(adev, max_limits, in si_apply_state_adjust_rules()
[all …]
A Dkv_dpm.c2220 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
2231 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
2235 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2354 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2356 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dvega10_hwmgr.c3290 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()
3298 max_limits->mclk) in vega10_apply_state_adjust_rules()
3300 max_limits->mclk; in vega10_apply_state_adjust_rules()
3302 max_limits->sclk) in vega10_apply_state_adjust_rules()
3304 max_limits->sclk; in vega10_apply_state_adjust_rules()
3322 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()
3338 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3364 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()
3368 max_limits->mclk : minimum_clocks.memoryClock; in vega10_apply_state_adjust_rules()
4364 info->engine_max_clock = max_limits->sclk; in vega10_get_dal_power_level()
[all …]
A Dsmu7_hwmgr.c3335 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local
3349 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()
3357 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()
3359 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()
3368 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()
3369 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()
3384 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3419 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()
3420 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()
3423 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()
[all …]
A Dvega12_hwmgr.c1821 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()
1824 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()
1825 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
A Dvega20_hwmgr.c2786 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()
2789 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()
2790 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()

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