| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_atomfirmware.c | 757 adev->gfx.config.max_sh_per_se = gfx_info->v24.max_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
775 adev->gfx.config.max_sh_per_se = gfx_info->v27.max_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
796 adev->gfx.config.max_sh_per_se = gfx_info->v30.max_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
|
| A D | gfx_v6_0.c | 1322 adev->gfx.config.max_sh_per_se); in gfx_v6_0_get_rb_active_bitmap()
1456 adev->gfx.config.max_sh_per_se; in gfx_v6_0_setup_rb()
1461 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_rb()
1465 ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v6_0_setup_rb()
1489 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_rb()
1537 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_spi()
1575 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_constants_init()
1592 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_constants_init()
1609 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_constants_init()
1626 adev->gfx.config.max_sh_per_se = 1; in gfx_v6_0_constants_init()
[all …]
|
| A D | gfx_v7_0.c | 1598 adev->gfx.config.max_sh_per_se); in gfx_v7_0_get_rb_active_bitmap()
1758 adev->gfx.config.max_sh_per_se; in gfx_v7_0_setup_rb()
1763 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v7_0_setup_rb()
1766 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v7_0_setup_rb()
1792 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v7_0_setup_rb()
3303 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v7_0_wait_for_rlc_serdes()
4221 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()
4238 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()
4256 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()
4274 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()
[all …]
|
| A D | amdgpu_gfx.h | 141 unsigned max_sh_per_se; member
|
| A D | gfx_v8_0.c | 1665 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
1682 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
1729 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
1745 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
1762 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
1780 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()
3435 adev->gfx.config.max_sh_per_se); in gfx_v8_0_get_rb_active_bitmap()
3597 adev->gfx.config.max_sh_per_se; in gfx_v8_0_setup_rb()
3602 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v8_0_setup_rb()
3631 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v8_0_setup_rb()
[all …]
|
| A D | amdgpu_debugfs.c | 130 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_process_reg_op()
255 if ((rd->id.grbm.sh != 0xFFFFFFFF && rd->id.grbm.sh >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_regs2_op()
720 config[no_regs++] = adev->gfx.config.max_sh_per_se; in amdgpu_debugfs_gca_config_read()
|
| A D | gfx_v9_0.c | 1493 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_init_always_on_cu_mask()
2263 adev->gfx.config.max_sh_per_se); in gfx_v9_0_get_rb_active_bitmap()
2274 adev->gfx.config.max_sh_per_se; in gfx_v9_0_setup_rb()
2278 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_setup_rb()
2281 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v9_0_setup_rb()
2421 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_wait_for_rlc_serdes()
4331 adev->gfx.config.max_sh_per_se; in gfx_v9_0_do_edc_gpr_workarounds()
7096 adev->gfx.config.max_sh_per_se > 16) in gfx_v9_0_get_cu_info()
7101 adev->gfx.config.max_sh_per_se); in gfx_v9_0_get_cu_info()
7105 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_get_cu_info()
[all …]
|
| A D | amdgpu_amdkfd.c | 487 cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_amdkfd_get_cu_info()
|
| A D | amdgpu_amdkfd_gfx_v9.c | 785 sh_cnt = adev->gfx.config.max_sh_per_se; in kgd_gfx_v9_get_cu_occupancy()
|
| A D | gfxhub_v2_1.c | 548 adev->gfx.config.max_sh_per_se * in gfxhub_v2_1_utcl2_harvest()
|
| A D | gfx_v10_0.c | 4750 adev->gfx.config.max_sh_per_se); in gfx_v10_0_get_rb_active_bitmap()
4762 adev->gfx.config.max_sh_per_se; in gfx_v10_0_setup_rb()
4766 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v10_0_setup_rb()
4767 bitmap = i * adev->gfx.config.max_sh_per_se + j; in gfx_v10_0_setup_rb()
4775 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v10_0_setup_rb()
4907 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v10_0_tcp_harvest()
9454 adev->gfx.config.max_sh_per_se * in gfx_v10_0_set_gds_init()
9543 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v10_0_get_cu_info()
9544 bitmap = i * adev->gfx.config.max_sh_per_se + j; in gfx_v10_0_get_cu_info()
9597 max_sa_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_sh_per_se * in gfx_v10_3_get_disabled_sa()
[all …]
|
| A D | amdgpu_atombios.c | 728 adev->gfx.config.max_sh_per_se = gfx_info->info.max_sh_per_se; in amdgpu_atombios_get_gfx_info()
|
| A D | gfx_v9_4_2.c | 1885 for (sh_idx = 0; sh_idx < adev->gfx.config.max_sh_per_se; in gfx_v9_4_2_query_sq_timeout_status()
1918 for (sh_idx = 0; sh_idx < adev->gfx.config.max_sh_per_se; in gfx_v9_4_2_reset_sq_timeout_status()
|
| A D | amdgpu_discovery.c | 1326 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1360 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
|
| A D | gfx_v11_0.c | 1518 sa_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_sh_per_se * in gfx_v11_0_get_sa_active_bitmap()
1559 adev->gfx.config.max_sh_per_se; in gfx_v11_0_setup_rb()
1561 adev->gfx.config.max_sh_per_se; in gfx_v11_0_setup_rb()
6364 adev->gfx.config.max_sh_per_se * in gfx_v11_0_set_gds_init()
6448 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v11_0_get_cu_info()
|
| A D | amdgpu_kms.c | 784 dev_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
|
| A D | amdgpu_device.c | 2015 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); in amdgpu_device_parse_gpu_info_fw()
3850 adev->gfx.config.max_sh_per_se, in amdgpu_device_init()
|
| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | radeon_kms.c | 466 *value = rdev->config.cik.max_sh_per_se; in radeon_info_ioctl()
468 *value = rdev->config.si.max_sh_per_se; in radeon_info_ioctl()
|
| A D | si.c | 3102 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()
3119 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()
3137 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()
3154 rdev->config.si.max_sh_per_se = 1; in si_gpu_init()
3171 rdev->config.si.max_sh_per_se = 1; in si_gpu_init()
3288 rdev->config.si.max_sh_per_se, in si_gpu_init()
3292 rdev->config.si.max_sh_per_se, in si_gpu_init()
3297 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { in si_gpu_init()
5324 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { in si_init_ao_cu_mask()
|
| A D | cik.c | 3181 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()
3198 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()
3216 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()
3234 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()
3336 rdev->config.cik.max_sh_per_se, in cik_gpu_init()
3341 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_gpu_init()
5787 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_wait_for_rlc_serdes()
6554 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_init_ao_cu_mask()
|
| A D | radeon.h | 2165 unsigned max_sh_per_se; member
2196 unsigned max_sh_per_se; member
|
| /linux-6.3-rc2/drivers/gpu/drm/amd/include/ |
| A D | atomfirmware.h | 1715 uint8_t max_sh_per_se; member
1735 uint8_t max_sh_per_se; member
1760 uint8_t max_sh_per_se; member
1795 uint8_t max_sh_per_se; member
1836 uint8_t max_sh_per_se; member
|
| A D | atombios.h | 5655 UCHAR max_sh_per_se; member
5668 UCHAR max_sh_per_se; member
|
| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | vangogh_ppt.c | 2137 adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines; in vangogh_post_smu_init()
2163 aon_bits = hweight32(tmp) * adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines; in vangogh_post_smu_init()
|