Home
last modified time | relevance | path

Searched refs:memclk_mhz (Results 1 – 22 of 22) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c272 …base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_update_clocks()
370 …base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_set_hard_min_memclk()
373 clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz); in dcn3_set_hard_min_memclk()
386 …base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_set_hard_max_memclk()
389 static void dcn3_set_max_memclk(struct clk_mgr *clk_mgr_base, unsigned int memclk_mhz) in dcn3_set_max_memclk() argument
396 dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz); in dcn3_set_max_memclk()
398 static void dcn3_set_min_memclk(struct clk_mgr *clk_mgr_base, unsigned int memclk_mhz) in dcn3_set_min_memclk() argument
404 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz); in dcn3_set_min_memclk()
418 &clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz, in dcn3_get_memclk_states_from_smu()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c278 if (bw_params->clk_table.entries[i].memclk_mhz > max_uclk_mhz) in build_synthetic_soc_states()
279 max_uclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in build_synthetic_soc_states()
289 if (bw_params->clk_table.entries[i].memclk_mhz > 0) in build_synthetic_soc_states()
338 entry.dram_speed_mts = bw_params->clk_table.entries[i].memclk_mhz * 16; in build_synthetic_soc_states()
382 if (bw_params->clk_table.entries[j].memclk_mhz * 16 >= table[i].dram_speed_mts) { in build_synthetic_soc_states()
383 table[i].dram_speed_mts = bw_params->clk_table.entries[j].memclk_mhz * 16; in build_synthetic_soc_states()
557 …if ((!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) && (bw_params->clk_table.entries[0].memclk_mhz in dcn321_update_bw_bounding_box_fpu()
609 dcn321_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn321_update_bw_bounding_box_fpu()
621 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn321_update_bw_bounding_box_fpu()
637 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn321_update_bw_bounding_box_fpu()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn302/
A Ddcn302_fpu.c220 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn302_fpu_update_bw_bounding_box()
262 dcn302_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn302_fpu_update_bw_bounding_box()
273 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn302_fpu_update_bw_bounding_box()
289 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn302_fpu_update_bw_bounding_box()
304 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn302_fpu_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn303/
A Ddcn303_fpu.c216 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn303_fpu_update_bw_bounding_box()
256 dcn303_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn303_fpu_update_bw_bounding_box()
267 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn303_fpu_update_bw_bounding_box()
284 bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn303_fpu_update_bw_bounding_box()
299 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn303_fpu_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr.h88 unsigned int memclk_mhz; member
288 void (*set_max_memclk)(struct clk_mgr *clk_mgr, unsigned int memclk_mhz);
289 void (*set_min_memclk)(struct clk_mgr *clk_mgr, unsigned int memclk_mhz);
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c501 .memclk_mhz = 800,
508 .memclk_mhz = 1600,
515 .memclk_mhz = 1067,
522 .memclk_mhz = 1600,
590 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
595 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c172 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; in dcn32_build_wm_range_table_fpu()
185 if (clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz) in dcn32_build_wm_range_table_fpu()
186 setb_min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz; in dcn32_build_wm_range_table_fpu()
2248 if (bw_params->clk_table.entries[i].memclk_mhz > max_uclk_mhz) in dcn32_patch_dpm_table()
2249 max_uclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in dcn32_patch_dpm_table()
2299 if (bw_params->clk_table.entries[i].memclk_mhz > max_uclk_mhz) in build_synthetic_soc_states()
2300 max_uclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in build_synthetic_soc_states()
2310 if (bw_params->clk_table.entries[i].memclk_mhz > 0) in build_synthetic_soc_states()
2359 entry.dram_speed_mts = bw_params->clk_table.entries[i].memclk_mhz * 16; in build_synthetic_soc_states()
2404 table[i].dram_speed_mts = bw_params->clk_table.entries[j].memclk_mhz * 16; in build_synthetic_soc_states()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c582 .memclk_mhz = 800,
589 .memclk_mhz = 1600,
596 .memclk_mhz = 1067,
603 .memclk_mhz = 1600,
666 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
A Ddcn32_clk_mgr.c441 ….entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels - 1].memclk_mhz); in dcn32_update_clocks()
687 ….entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels - 1].memclk_mhz); in dcn32_set_hard_min_memclk()
690 clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz); in dcn32_set_hard_min_memclk()
703 ….entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels - 1].memclk_mhz); in dcn32_set_hard_max_memclk()
718 &clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz, in dcn32_get_memclk_states_from_smu()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_clk_mgr.c508 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn315_clk_mgr_helper_populate_bw_params()
520 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[0].MemClk; in dcn315_clk_mgr_helper_populate_bw_params()
534 bw_params->clk_table.entries[i].memclk_mhz = def_max.memclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddcn314_fpu.c240 if (clk_table->entries[i].memclk_mhz && clk_table->entries[i].wck_ratio) in dcn314_update_bw_bounding_box_fpu()
241 …clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2 * clk_table->entries[i].wck_… in dcn314_update_bw_bounding_box_fpu()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c625 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[min_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()
641 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()
669 bw_params->clk_table.entries[i].memclk_mhz = def_max.memclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddcn31_fpu.c612 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * in dcn31_update_bw_bounding_box()
684 …dcn3_15_soc.clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2 * clk_table->ent… in dcn315_update_bw_bounding_box()
773 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * in dcn316_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c2132 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn30_update_bw_bounding_box()
2170 dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn30_update_bw_bounding_box()
2183 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
2199 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
2214 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
A Ddcn30_hwseq.c998 …k_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn30_prepare_bandwidth()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c355 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in dcn301_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddcn30_fpu.c453 …r->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz * 16; in dcn30_fpu_calculate_wm_and_dlg()
666 uint16_t min_uclk_mhz = base->bw_params->clk_table.entries[0].memclk_mhz; in dcn3_fpu_build_wm_range_table()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_clk_mgr.c532 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn316_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c594 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn31_clk_mgr_helper_populate_bw_params()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c4564 static void blank_and_force_memclk(struct dc *dc, bool apply, unsigned int memclk_mhz) in blank_and_force_memclk() argument
4587 dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, memclk_mhz); in blank_and_force_memclk()
4588 dc->clk_mgr->funcs->set_min_memclk(dc->clk_mgr, memclk_mhz); in blank_and_force_memclk()
4629 …lk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz; in dc_enable_dcmode_clk_limit()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c2264 low_pstate_lvl.dram_speed_mts = clk_table->entries[0].memclk_mhz * 2; in construct_low_pstate_lvl()
2317 s[k].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in dcn21_update_bw_bounding_box()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_hwseq.c701 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn32_initialize_min_clocks()

Completed in 50 milliseconds