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Searched refs:mg_pll_bias (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_dpll_mgr.h228 u32 mg_pll_bias; member
A Dintel_dpll_mgr.c2980 pll_state->mg_pll_bias = (m2div_frac ? DKL_PLL_BIAS_FRAC_EN_H : 0) | in icl_calc_mg_pll_state()
3031 pll_state->mg_pll_bias = in icl_calc_mg_pll_state()
3051 pll_state->mg_pll_bias &= pll_state->mg_pll_bias_mask; in icl_calc_mg_pll_state()
3071 if (pll_state->mg_pll_bias & DKL_PLL_BIAS_FRAC_EN_H) { in icl_ddi_mg_pll_get_freq()
3072 m2_frac = pll_state->mg_pll_bias & in icl_ddi_mg_pll_get_freq()
3441 hw_state->mg_pll_bias = intel_de_read(dev_priv, MG_PLL_BIAS(tc_port)); in mg_pll_get_hw_state()
3454 hw_state->mg_pll_bias &= hw_state->mg_pll_bias_mask; in mg_pll_get_hw_state()
3519 hw_state->mg_pll_bias &= (DKL_PLL_BIAS_FRAC_EN_H | in dkl_pll_get_hw_state()
3689 val |= hw_state->mg_pll_bias; in icl_mg_pll_write()
3753 val |= hw_state->mg_pll_bias; in dkl_pll_write()
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A Dintel_display_debugfs.c977 pll->state.hw_state.mg_pll_bias); in i915_shared_dplls_info()
A Dintel_display.c5827 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias); in intel_pipe_config_compare()

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