Home
last modified time | relevance | path

Searched refs:mmSDMA0_RLC1_RB_CNTL (Results 1 – 15 of 15) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_amdkfd_arcturus.c113 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
A Dcikd.h563 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
A Damdgpu_amdkfd_gfx_v10.c175 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
A Damdgpu_amdkfd_gfx_v9.c202 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
A Damdgpu_amdkfd_gfx_v10_3.c159 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset()
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/sdma0/
A Dsdma0_4_1_offset.h374 #define mmSDMA0_RLC1_RB_CNTL macro
A Dsdma0_4_0_offset.h462 #define mmSDMA0_RLC1_RB_CNTL 0x01a0 macro
A Dsdma0_4_2_2_offset.h462 #define mmSDMA0_RLC1_RB_CNTL macro
A Dsdma0_4_2_offset.h458 #define mmSDMA0_RLC1_RB_CNTL macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/
A Doss_2_4_d.h242 #define mmSDMA0_RLC1_RB_CNTL 0x3580 macro
A Doss_3_0_1_d.h291 #define mmSDMA0_RLC1_RB_CNTL 0x3580 macro
A Doss_2_0_d.h291 #define mmSDMA0_RLC1_RB_CNTL 0x3580 macro
A Doss_3_0_d.h410 #define mmSDMA0_RLC1_RB_CNTL 0x3580 macro
/linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/
A Dgc_10_1_0_offset.h453 #define mmSDMA0_RLC1_RB_CNTL macro
A Dgc_10_3_0_offset.h454 #define mmSDMA0_RLC1_RB_CNTL macro

Completed in 212 milliseconds