| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | cik_ih.c | 386 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
389 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
390 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
395 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
396 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
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| A D | cz_ih.c | 383 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
386 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
387 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
392 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
393 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
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| A D | iceland_ih.c | 377 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
380 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
381 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
386 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
387 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
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| A D | tonga_ih.c | 434 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
437 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
438 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
443 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
444 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
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| A D | gmc_v6_0.c | 1003 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1006 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1007 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1012 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1013 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
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| A D | vce_v3_0.c | 685 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
688 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
689 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
694 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
695 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
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| A D | sdma_v2_4.c | 978 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
981 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
982 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
987 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
988 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
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| A D | cik_sdma.c | 1085 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1088 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1089 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1094 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1095 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
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| A D | gmc_v7_0.c | 1197 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1200 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1201 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1206 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1207 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
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| A D | vce_v4_0.c | 781 tmp = RREG32(mmSRBM_SOFT_RESET);
784 WREG32(mmSRBM_SOFT_RESET, tmp);
785 tmp = RREG32(mmSRBM_SOFT_RESET);
790 WREG32(mmSRBM_SOFT_RESET, tmp);
791 tmp = RREG32(mmSRBM_SOFT_RESET);
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| A D | uvd_v6_0.c | 1205 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1208 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1209 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1214 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1215 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
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| A D | sdma_v3_0.c | 1312 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1315 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1316 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1321 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1322 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
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| A D | gmc_v8_0.c | 1356 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1359 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1360 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1365 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1366 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
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| A D | uvd_v3_1.c | 337 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v3_1_start()
782 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v3_1_soft_reset()
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| A D | uvd_v4_2.c | 295 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start()
682 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
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| A D | uvd_v5_0.c | 348 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start()
604 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
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| A D | uvd_v7_0.c | 1527 tmp = RREG32(mmSRBM_SOFT_RESET);
1530 WREG32(mmSRBM_SOFT_RESET, tmp);
1531 tmp = RREG32(mmSRBM_SOFT_RESET);
1536 WREG32(mmSRBM_SOFT_RESET, tmp);
1537 tmp = RREG32(mmSRBM_SOFT_RESET);
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| A D | dce_v8_0.c | 2868 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2871 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2872 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2877 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2878 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
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| A D | dce_v10_0.c | 2975 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2978 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2979 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2984 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2985 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
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| A D | dce_v11_0.c | 3098 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3101 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3102 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3107 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3108 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| A D | oss_1_0_d.h | 262 #define mmSRBM_SOFT_RESET 0x0398 macro
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| A D | oss_2_4_d.h | 83 #define mmSRBM_SOFT_RESET 0x398 macro
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| A D | oss_3_0_1_d.h | 81 #define mmSRBM_SOFT_RESET 0x398 macro
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| A D | oss_2_0_d.h | 77 #define mmSRBM_SOFT_RESET 0x398 macro
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| A D | oss_3_0_d.h | 93 #define mmSRBM_SOFT_RESET 0x398 macro
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