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Searched refs:mr_cache (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/net/ethernet/mellanox/mlx5/core/
A Dmain.c114 .mr_cache[0] = {
118 .mr_cache[1] = {
122 .mr_cache[2] = {
126 .mr_cache[3] = {
130 .mr_cache[4] = {
134 .mr_cache[5] = {
138 .mr_cache[6] = {
142 .mr_cache[7] = {
146 .mr_cache[8] = {
150 .mr_cache[9] = {
[all …]
/linux-6.3-rc2/include/linux/mlx5/
A Ddriver.h755 } mr_cache[MAX_MKEY_CACHE_ENTRIES]; member
/linux-6.3-rc2/drivers/infiniband/hw/mlx5/
A Dmr.c915 ent->limit = dev->mdev->profile.mr_cache[order].limit; in mlx5r_cache_create_ent_locked()

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