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Searched refs:mtctl (Results 1 – 20 of 20) sorted by relevance

/linux-6.3-rc2/arch/parisc/kernel/
A Dhead.S77 mtctl %r10,%cr11
169 mtctl %r6,%cr30
280 mtctl %r0,%cr8
281 mtctl %r0,%cr9
282 mtctl %r0,%cr12
283 mtctl %r0,%cr13
296 mtctl %r10,%cr11
311 mtctl %r10,%cr14
329 mtctl %r11,%cr18 /* IIAOQ head */
334 mtctl %r10,%ipsw
[all …]
A Dreal2.S107 # define POP_CR(r, where) LDREG,mb -REG_SZ(where), %r1 ! mtctl %r1, r
157 mtctl %r0, %cr17 /* Clear IIASQ tail */
158 mtctl %r0, %cr17 /* Clear IIASQ head */
159 mtctl %r1, %cr18 /* IIAOQ head */
161 mtctl %r1, %cr18 /* IIAOQ tail */
163 mtctl %r1, %cr22
194 mtctl %r0, %cr17 /* Clear IIASQ tail */
195 mtctl %r0, %cr17 /* Clear IIASQ head */
196 mtctl %r1, %cr18 /* IIAOQ head */
198 mtctl %r1, %cr18 /* IIAOQ tail */
[all …]
A Drelocate_kernel.S62 mtctl %r0, %cr17 /* IIASQ */
63 mtctl %r0, %cr17 /* IIASQ */
64 mtctl %r1, %cr18 /* IIAOQ */
66 mtctl %r1, %cr18 /* IIAOQ */
69 mtctl %r1, %cr22 /* IPSW */
71 mtctl %r0, %cr22 /* IPSW */
133 mtctl %r0, %cr15
A Dhpmc.S126 mtctl %r4,ipsw
127 mtctl %r0,pcsq
128 mtctl %r0,pcsq
130 mtctl %r4,pcoq
132 mtctl %r4,pcoq
235 mtctl %r4,%cr24 /* Initialize kernel root pointer */
236 mtctl %r4,%cr25 /* Initialize user root pointer */
A Dtoc_asm.S46 mtctl %r4,%cr24
47 mtctl %r4,%cr25
A Dpacache.S52 mtctl %r0, %cr17 /* Clear IIASQ tail */
53 mtctl %r0, %cr17 /* Clear IIASQ head */
54 mtctl %r1, %cr18 /* IIAOQ head */
56 mtctl %r1, %cr18 /* IIAOQ tail */
58 mtctl %r1, %ipsw
166 mtctl %r1, %cr18 /* IIAOQ head */
168 mtctl %r1, %cr18 /* IIAOQ tail */
1225 mtctl %r1, %cr18 /* IIAOQ head */
1227 mtctl %r1, %cr18 /* IIAOQ tail */
1229 mtctl %r1, %ipsw
[all …]
A Dtime.c117 mtctl(next_tick, 16); in timer_interrupt()
160 mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */ in start_cpu_itimer()
A Dkgdb.c201 mtctl(-1, 0); in kgdb_arch_handle_exception()
203 mtctl(0, 0); in kgdb_arch_handle_exception()
A Dsmp.c489 mtctl(~0UL, CR_EIRR); in __cpu_disable()
491 mtctl(0, CR_EIRR); in __cpu_disable()
A Dperf_asm.S43 mtctl %r26,ccr ; turn on performance coprocessor
48 mtctl %r26,ccr ; turn off performance coprocessor
69 mtctl %r26,ccr ; turn on performance coprocessor
74 mtctl %r26,ccr ; turn off performance coprocessor
A Dcache.c357 mtctl(pgd_lock, 28); in flush_user_cache_page()
359 mtctl(pgd, 25); in flush_user_cache_page()
361 mtctl(prot, 8); in flush_user_cache_page()
A Dirq.c84 mtctl(mask, 23); in cpu_ack_irq()
571 mtctl(~0UL, 23); /* EIRR : clear all pending external intr */ in init_IRQ()
A Dsetup.c410 mtctl(coproc_cfg.ccr_functional, 10); in start_parisc()
A Dprocessor.c336 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */ in init_per_cpu()
A Dentry.S761 mtctl %r25,%cr30
764 mtctl %r0, %cr0 /* Needed for single stepping */
1648 mtctl %r3, %cr27
1801 mtctl %r2,%cr0 /* for immediate trap */
2034 mtctl %rp, %cr11
A Dsignal.c342 mtctl(-1, 0); in setup_rt_frame()
A Dsyscall.S110 mtctl %r26, %cr27 /* move arg0 to the control register */
/linux-6.3-rc2/arch/parisc/include/asm/
A Dmmu_context.h47 mtctl(__space_to_prot(context), 8); in load_context()
58 mtctl(__pa(__ldcw_align(&pgd_lock->rlock.raw_lock)), 28); in switch_mm_irqs_off()
60 mtctl(__pa(next->pgd), 25); in switch_mm_irqs_off()
A Dspecial_insns.h46 #define mtctl(gr, cr) \ macro
52 #define set_eiem(val) mtctl(val, CR_EIEM)
A Dassembly.h209 #define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
414 mtctl %r3, %cr27
458 mtctl %r3, %cr27
474 mtctl %r0, %cr17
478 mtctl %r0, %cr18
560 mtctl %r0, %cr17 /* Clear IIASQ tail */
561 mtctl %r0, %cr17 /* Clear IIASQ head */
562 mtctl %r1, %ipsw
564 mtctl %r1, %cr18 /* Set IIAOQ tail */
566 mtctl %r1, %cr18 /* Set IIAOQ head */

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