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Searched refs:mul (Results 1 – 25 of 106) sorted by relevance

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/linux-6.3-rc2/arch/mips/ar7/
A Dclock.c72 u32 mul; member
101 int *postdiv, int *mul) in approximate() argument
110 *mul = i; in approximate()
118 int *mul) in calculate() argument
125 *mul = target / tmp_gcd; in calculate()
127 if ((*mul < 1) || (*mul >= 16)) in calculate()
195 product = (mul & 1) ? in tnetd7300_get_clock()
196 (base_clock * mul) >> 1 : in tnetd7300_get_clock()
201 if (mul == 16) in tnetd7300_get_clock()
210 int prediv, postdiv, mul; in tnetd7300_set_clock() local
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/linux-6.3-rc2/drivers/clk/
A Dclk-vt8500.c455 u32 mul; in wm8750_find_pll_bits() local
464 for (mul = 0; mul <= 255; mul++) { in wm8750_find_pll_bits()
472 *multiplier = mul; in wm8750_find_pll_bits()
480 *multiplier = mul; in wm8750_find_pll_bits()
503 u32 mul; in wm8850_find_pll_bits() local
512 for (mul = 0; mul <= 127; mul++) { in wm8850_find_pll_bits()
513 tclk = parent_rate * ((mul + 1) * 2) / in wm8850_find_pll_bits()
520 *multiplier = mul; in wm8850_find_pll_bits()
528 *multiplier = mul; in wm8850_find_pll_bits()
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
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A Dclk-cdce706.c73 unsigned mul; member
172 if (hwd->div && hwd->mul) { in cdce706_pll_recalc_rate()
189 unsigned long mul, div; in cdce706_pll_round_rate() local
198 &mul, &div); in cdce706_pll_round_rate()
199 hwd->mul = mul; in cdce706_pll_round_rate()
204 __func__, hwd->idx, mul, div); in cdce706_pll_round_rate()
215 unsigned long mul = hwd->mul, div = hwd->div; in cdce706_pll_set_rate() local
220 __func__, hwd->idx, mul, div); in cdce706_pll_set_rate()
295 unsigned long mul, div; in cdce706_divider_round_rate() local
303 &mul, &div); in cdce706_divider_round_rate()
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A Dclk-moxart.c21 unsigned int mul; in moxart_of_pll_clk_init() local
34 mul = readl(base + 0x30) >> 3 & 0x3f; in moxart_of_pll_clk_init()
43 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); in moxart_of_pll_clk_init()
A Dclk-nomadik.c230 u8 mul; in pll_clk_recalc_rate() local
233 mul = (val >> 8) & 0x3FU; in pll_clk_recalc_rate()
234 mul += 2; in pll_clk_recalc_rate()
236 return (parent_rate * mul) >> div; in pll_clk_recalc_rate()
240 u8 mul; in pll_clk_recalc_rate() local
242 mul = (val >> 24) & 0x3FU; in pll_clk_recalc_rate()
243 mul += 2; in pll_clk_recalc_rate()
244 return (parent_rate * mul); in pll_clk_recalc_rate()
/linux-6.3-rc2/drivers/clk/actions/
A Dowl-factor.c34 *mul = clkt->mul; in _get_table_div_mul()
51 calc_rate = parent_rate * clkt->mul; in _get_table_val()
85 try_parent_rate = rate * clkt->div / clkt->mul; in owl_clk_val_best()
89 __func__, clkt->val, clkt->mul, clkt->div, in owl_clk_val_best()
125 unsigned int val, mul = 0, div = 1; in owl_factor_helper_round_rate() local
128 _get_table_div_mul(clkt, val, &mul, &div); in owl_factor_helper_round_rate()
130 return *parent_rate * mul / div; in owl_factor_helper_round_rate()
149 u32 reg, val, mul, div; in owl_factor_helper_recalc_rate() local
152 mul = 0; in owl_factor_helper_recalc_rate()
159 _get_table_div_mul(clkt, val, &mul, &div); in owl_factor_helper_recalc_rate()
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A Dowl-pll.c20 u32 mul; in owl_pll_calculate_mul() local
22 mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq); in owl_pll_calculate_mul()
23 if (mul < pll_hw->min_mul) in owl_pll_calculate_mul()
24 mul = pll_hw->min_mul; in owl_pll_calculate_mul()
25 else if (mul > pll_hw->max_mul) in owl_pll_calculate_mul()
26 mul = pll_hw->max_mul; in owl_pll_calculate_mul()
28 return mul & mul_mask(pll_hw); in owl_pll_calculate_mul()
65 u32 mul; in owl_pll_round_rate() local
76 mul = owl_pll_calculate_mul(pll_hw, rate); in owl_pll_round_rate()
78 return pll_hw->bfreq * mul; in owl_pll_round_rate()
/linux-6.3-rc2/drivers/clk/tegra/
A Dclk-utils.c16 int mul; in div_frac_get() local
21 mul = 1 << frac_width; in div_frac_get()
24 divider_ux1 *= mul; in div_frac_get()
32 divider_ux1 *= mul; in div_frac_get()
34 if (divider_ux1 < mul) in div_frac_get()
37 divider_ux1 -= mul; in div_frac_get()
A Dclk-divider.c40 int div, mul; in clk_frac_div_recalc_rate() local
51 mul = get_mul(divider); in clk_frac_div_recalc_rate()
52 div += mul; in clk_frac_div_recalc_rate()
54 rate *= mul; in clk_frac_div_recalc_rate()
65 int div, mul; in clk_frac_div_round_rate() local
75 mul = get_mul(divider); in clk_frac_div_round_rate()
77 return DIV_ROUND_UP(output_rate * mul, div + mul); in clk_frac_div_round_rate()
A Dclk-periph-fixed.c57 rate = (unsigned long long)parent_rate * fixed->mul; in tegra_clk_periph_fixed_recalc_rate()
74 unsigned int mul, in tegra_clk_register_periph_fixed() argument
99 fixed->mul = mul; in tegra_clk_register_periph_fixed()
/linux-6.3-rc2/drivers/clk/at91/
A Dclk-pll.c40 u16 mul; member
69 u16 mul; in clk_pll_prepare() local
73 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
77 (div == pll->div && mul == pll->mul)) in clk_pll_prepare()
118 if (!pll->div || !pll->mul) in clk_pll_recalc_rate()
126 u32 *div, u32 *mul, in clk_pll_get_best_div_mul() argument
226 if (mul) in clk_pll_get_best_div_mul()
227 *mul = bestmul - 1; in clk_pll_get_best_div_mul()
249 u32 mul; in clk_pll_set_rate() local
253 &div, &mul, &index); in clk_pll_set_rate()
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/linux-6.3-rc2/drivers/cpufreq/
A Dcpufreq-nforce2.c25 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) argument
69 unsigned char mul, div; in nforce2_calc_fsb() local
71 mul = (pll >> 8) & 0xff; in nforce2_calc_fsb()
75 return NFORCE2_XTAL * mul / div; in nforce2_calc_fsb()
89 unsigned char mul = 0, div = 0; in nforce2_calc_pll() local
93 while (((mul == 0) || (div == 0)) && (tried <= 3)) { in nforce2_calc_pll()
98 mul = xmul; in nforce2_calc_pll()
104 if ((mul == 0) || (div == 0)) in nforce2_calc_pll()
107 return NFORCE2_PLL(mul, div); in nforce2_calc_pll()
/linux-6.3-rc2/include/linux/
A Dmath64.h164 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
166 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr()
171 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument
173 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr()
180 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
188 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr()
190 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr()
261 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) in mul_u64_u32_div() argument
275 rl.ll = mul_u32_u32(u.l.low, mul); in mul_u64_u32_div()
276 rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; in mul_u64_u32_div()
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/linux-6.3-rc2/drivers/net/wireless/ath/ath9k/
A Dcommon.h39 #define ATH_EP_MUL(x, mul) ((x) * (mul)) argument
47 #define ATH_EP_RND(x, mul) \ argument
48 (((x) + ((mul)/2)) / (mul))
/linux-6.3-rc2/arch/mips/ralink/
A Dmt7620.c53 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) in mt7620_calc_rate() argument
58 t *= mul; in mt7620_calc_rate()
96 u32 mul; in mt7620_get_cpu_pll_rate() local
106 mul = (reg >> CPLL_CFG0_PLL_MULT_RATIO_SHIFT) & in mt7620_get_cpu_pll_rate()
108 mul += 24; in mt7620_get_cpu_pll_rate()
110 mul *= 2; in mt7620_get_cpu_pll_rate()
117 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()
139 u32 mul; in mt7620_get_cpu_rate() local
144 mul = reg & CPU_SYS_CLKCFG_CPU_FFRAC_MASK; in mt7620_get_cpu_rate()
148 return mt7620_calc_rate(pll_rate, mul, div); in mt7620_get_cpu_rate()
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_fixed.h75 static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) in mul_round_up_u32_fixed16() argument
79 tmp = mul_u32_u32(val, mul.val); in mul_round_up_u32_fixed16()
87 uint_fixed_16_16_t mul) in mul_fixed16()
91 tmp = mul_u32_u32(val.val, mul.val); in mul_fixed16()
118 static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) in mul_u32_fixed16() argument
122 tmp = mul_u32_u32(val, mul.val); in mul_u32_fixed16()
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_afmt.c54 unsigned long div, mul; in amdgpu_afmt_calc_cts() local
70 mul = ((128*freq/1000) + (n-1))/n; in amdgpu_afmt_calc_cts()
72 n *= mul; in amdgpu_afmt_calc_cts()
73 cts *= mul; in amdgpu_afmt_calc_cts()
/linux-6.3-rc2/arch/arm/lib/
A Dmuldi3.S28 mul xh, yl, xh
35 mul yh, xl, yh
36 mul xl, yl, xl
37 mul ip, yl, ip
/linux-6.3-rc2/arch/m68k/fpsp040/
A Dbinstr.S16 | bit 63. The fraction is multiplied by 10 using a mul by 2
17 | shift and a mul by 8 shift. The bits shifted out of the
51 | d2: upper 32-bits of fraction for mul by 8
52 | d3: lower 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
54 | d5: lower 32-bits of fraction for mul by 2
97 asll #1,%d5 |mul d5 by 2
98 roxll #1,%d4 |mul d4 by 2
100 addxw %d6,%d1 |add in extend from mul by 2
102 | A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
/linux-6.3-rc2/arch/x86/include/asm/
A Ddiv64.h81 static inline u64 mul_u64_u64_div_u64(u64 a, u64 mul, u64 div) in mul_u64_u64_div_u64() argument
86 : "a" (a), "rm" (mul), "rm" (div) in mul_u64_u64_div_u64()
93 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div) in mul_u64_u32_div() argument
95 return mul_u64_u64_div_u64(a, mul, div); in mul_u64_u32_div()
/linux-6.3-rc2/drivers/pwm/
A Dpwm-img.c95 unsigned long mul, output_clk_hz, input_clk_hz; in img_pwm_config() local
109 mul = DIV_ROUND_UP(input_clk_hz, output_clk_hz); in img_pwm_config()
110 if (mul <= max_timebase) { in img_pwm_config()
112 timebase = DIV_ROUND_UP(mul, 1); in img_pwm_config()
113 } else if (mul <= max_timebase * 8) { in img_pwm_config()
115 timebase = DIV_ROUND_UP(mul, 8); in img_pwm_config()
116 } else if (mul <= max_timebase * 64) { in img_pwm_config()
118 timebase = DIV_ROUND_UP(mul, 64); in img_pwm_config()
119 } else if (mul <= max_timebase * 512) { in img_pwm_config()
121 timebase = DIV_ROUND_UP(mul, 512); in img_pwm_config()
/linux-6.3-rc2/drivers/media/i2c/
A Dccs-pll.c314 pll_fr->pll_multiplier = mul * more_mul; in __ccs_pll_calculate_vt_tree()
409 u32 mul, div; in ccs_pll_calculate_vt_tree() local
417 pll_fr->pre_pll_clk_div, mul, div); in ccs_pll_calculate_vt_tree()
420 mul, div); in ccs_pll_calculate_vt_tree()
621 op_pll_fr->pre_pll_clk_div * mul)); in ccs_pll_calculate_op()
638 op_pll_fr->pre_pll_clk_div * mul); in ccs_pll_calculate_op()
668 op_pll_fr->pll_multiplier = mul * i; in ccs_pll_calculate_op()
713 u32 mul, div; in ccs_pll_calculate() local
807 mul = op_sys_clk_freq_hz_sdr / i; in ccs_pll_calculate()
814 mul / in ccs_pll_calculate()
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/linux-6.3-rc2/drivers/clk/imgtec/
A Dclk-boston.c34 uint mmcmdiv, mul, cpu_div, sys_div; in clk_boston_setup() local
53 mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); in clk_boston_setup()
56 sys_freq = mult_frac(in_freq, mul, sys_div); in clk_boston_setup()
59 cpu_freq = mult_frac(in_freq, mul, cpu_div); in clk_boston_setup()
/linux-6.3-rc2/drivers/gpu/drm/tegra/
A Dhda.c14 unsigned int mul, div, bits, channels; in tegra_hda_parse_format() local
26 mul = (format & AC_FMT_MULT_MASK) >> AC_FMT_MULT_SHIFT; in tegra_hda_parse_format()
29 fmt->sample_rate *= (mul + 1) / (div + 1); in tegra_hda_parse_format()
/linux-6.3-rc2/arch/arm/boot/compressed/
A Dll_char_wr.S66 mul r7, r2, r7
71 mul r7, r2, r7
85 mul r4, r2, ip
88 mul ip, r2, ip @ avoid r4
95 mul r4, r2, ip
98 mul ip, r2, ip @ avoid r4

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