| /linux-6.3-rc2/drivers/mailbox/ |
| A D | rockchip-mailbox.c | 31 int num_chans; member
84 writel_relaxed((1 << mb->mbox.num_chans) - 1, in rockchip_mbox_startup()
113 for (idx = 0; idx < mb->mbox.num_chans; idx++) { in rockchip_mbox_irq()
131 for (idx = 0; idx < mb->mbox.num_chans; idx++) { in rockchip_mbox_isr()
155 .num_chans = 4,
180 mb->chans = devm_kcalloc(&pdev->dev, drv_data->num_chans, in rockchip_mbox_probe()
185 mb->mbox.chans = devm_kcalloc(&pdev->dev, drv_data->num_chans, in rockchip_mbox_probe()
193 mb->mbox.num_chans = drv_data->num_chans; in rockchip_mbox_probe()
206 mb->buf_size = (size_t)resource_size(res) / (drv_data->num_chans * 2); in rockchip_mbox_probe()
222 for (i = 0; i < mb->mbox.num_chans; i++) { in rockchip_mbox_probe()
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| A D | qcom-ipcc.c | 57 int num_chans; member
177 for (chan_id = 0; chan_id < mbox->num_chans; chan_id++) { in qcom_ipcc_mbox_xlate()
188 if (chan_id >= mbox->num_chans) in qcom_ipcc_mbox_xlate()
220 ipcc->num_chans = 0; in qcom_ipcc_setup_mbox()
231 ipcc->num_chans++; in qcom_ipcc_setup_mbox()
238 if (!ipcc->num_chans) in qcom_ipcc_setup_mbox()
241 ipcc->chans = devm_kcalloc(dev, ipcc->num_chans, in qcom_ipcc_setup_mbox()
248 mbox->num_chans = ipcc->num_chans; in qcom_ipcc_setup_mbox()
323 if (ipcc->num_chans) in qcom_ipcc_probe()
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| A D | arm_mhu_db.c | 66 for (i = 0; i < mbox->num_chans; i++) { in mhu_db_mbox_to_channel()
172 for (i = 0; i < mbox->num_chans; i++) in mhu_db_shutdown()
176 if (mbox->num_chans == i) { in mhu_db_shutdown()
214 for (i = 0; i < mbox->num_chans; i++) in mhu_db_mbox_xlate()
218 if (mbox->num_chans == i) { in mhu_db_mbox_xlate()
291 mhu->mbox.num_chans = max_chans; in mhu_db_probe()
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| A D | mailbox-sti.c | 104 for (i = 0; i < mbox->num_chans; i++) { in sti_mbox_to_channel()
306 for (i = 0; i < mbox->num_chans; i++) in sti_mbox_shutdown_chan()
310 if (mbox->num_chans == i) { in sti_mbox_shutdown_chan()
340 for (i = 0; i < mbox->num_chans; i++) { in sti_mbox_xlate()
457 mbox->num_chans = STI_MBOX_CHAN_MAX; in sti_mbox_probe()
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| A D | mailbox.c | 125 for (i = 0; i < mbox->num_chans; i++) { in txdone_hrtimer()
472 if (ind >= mbox->num_chans) in of_mbox_index_xlate()
489 if (!mbox || !mbox->dev || !mbox->ops || !mbox->num_chans) in mbox_controller_register()
512 for (i = 0; i < mbox->num_chans; i++) { in mbox_controller_register()
547 for (i = 0; i < mbox->num_chans; i++) in mbox_controller_unregister()
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| A D | stm32-ipcc.c | 295 ipcc->controller.num_chans = ipcc->n_chans; in stm32_ipcc_probe()
296 ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans, in stm32_ipcc_probe()
304 for (i = 0; i < ipcc->controller.num_chans; i++) in stm32_ipcc_probe()
318 ipcc->controller.num_chans, ipcc->proc_id); in stm32_ipcc_probe()
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| A D | tegra-hsp.c | 198 for_each_set_bit(master, &value, hsp->mbox_db.num_chans) { in tegra_hsp_doorbell_irq()
315 if (db->master >= chan->mbox->num_chans) { in tegra_hsp_doorbell_startup()
603 for (i = 0; i < mbox->num_chans; i++) { in tegra_hsp_db_xlate()
793 hsp->mbox_db.num_chans = 32; in tegra_hsp_probe()
797 hsp->mbox_db.chans = devm_kcalloc(&pdev->dev, hsp->mbox_db.num_chans, in tegra_hsp_probe()
821 hsp->mbox_sm.num_chans = hsp->num_sm; in tegra_hsp_probe()
825 hsp->mbox_sm.chans = devm_kcalloc(&pdev->dev, hsp->mbox_sm.num_chans, in tegra_hsp_probe()
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| A D | imx-mailbox.c | 662 if (chan >= mbox->num_chans) { in imx_mu_specific_xlate()
684 if (chan >= mbox->num_chans) { in imx_mu_xlate()
729 priv->mbox.num_chans = IMX_MU_CHANS; in imx_mu_init_generic()
751 int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; in imx_mu_init_specific() local
753 for (i = 0; i < num_chans; i++) { in imx_mu_init_specific()
764 priv->mbox.num_chans = num_chans; in imx_mu_init_specific()
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| A D | arm_mhuv2.c | 651 while (i < mhu->mbox.num_chans) { in get_irq_chan_stat_rx()
867 mhu->mbox.num_chans = channels; in mhuv2_verify_protocol()
879 chans = devm_kcalloc(dev, mbox->num_chans, sizeof(*chans), GFP_KERNEL); in mhuv2_allocate_channels()
925 BUG_ON(chans - mbox->chans != mbox->num_chans); in mhuv2_allocate_channels()
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| A D | arm_mhu.c | 137 mhu->mbox.num_chans = MHU_CHANS; in mhu_probe()
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| /linux-6.3-rc2/drivers/input/joystick/ |
| A D | adc-joystick.c | 28 int num_chans; member
37 for (i = 0; i < joy->num_chans; i++) { in adc_joystick_poll()
56 for (i = 0; i < joy->num_chans; ++i) { in adc_joystick_handle()
134 if (num_axes != joy->num_chans) { in adc_joystick_set_axes()
136 num_axes, joy->num_chans); in adc_joystick_set_axes()
240 joy->num_chans = i; in adc_joystick_probe()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| A D | dcn303_fpu.c | 173 bw_from_dram1 = uclk_mts * dcn3_03_soc.num_chans * in dcn303_get_optimal_dcfclk_fclk_for_uclk()
175 bw_from_dram2 = uclk_mts * dcn3_03_soc.num_chans * in dcn303_get_optimal_dcfclk_fclk_for_uclk()
207 if (dc->ctx->dc_bios->vram_info.num_chans) in dcn303_fpu_update_bw_bounding_box()
208 dcn3_03_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn303_fpu_update_bw_bounding_box()
328 if (dcn3_03_soc.num_chans <= 4) { in dcn303_fpu_update_bw_bounding_box()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| A D | dcn321_fpu.c | 149 .num_chans = 8,
168 entry->dram_speed_mts = bw_on_sdp / (dcn3_21_soc.num_chans * in get_optimal_ntuple()
174 entry->dram_speed_mts = bw_on_fabric / (dcn3_21_soc.num_chans * in get_optimal_ntuple()
177 float bw_on_dram = entry->dram_speed_mts * dcn3_21_soc.num_chans * in get_optimal_ntuple()
192 memory_bw_kbytes_sec = entry->dram_speed_mts * dcn3_21_soc.num_chans * in calculate_net_bw_in_kbytes_sec()
443 bw_from_dram1 = uclk_mts * dcn3_21_soc.num_chans * in dcn321_get_optimal_dcfclk_fclk_for_uclk()
445 bw_from_dram2 = uclk_mts * dcn3_21_soc.num_chans * in dcn321_get_optimal_dcfclk_fclk_for_uclk()
537 if (dc->ctx->dc_bios->vram_info.num_chans) { in dcn321_update_bw_bounding_box_fpu()
538 dcn3_21_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn321_update_bw_bounding_box_fpu()
540 dc->ctx->dc_bios->vram_info.num_chans) * dc->caps.mall_size_per_mem_channel); in dcn321_update_bw_bounding_box_fpu()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| A D | dcn302_fpu.c | 175 bw_from_dram1 = uclk_mts * dcn3_02_soc.num_chans * in dcn302_get_optimal_dcfclk_fclk_for_uclk()
178 bw_from_dram2 = uclk_mts * dcn3_02_soc.num_chans * in dcn302_get_optimal_dcfclk_fclk_for_uclk()
211 if (dc->ctx->dc_bios->vram_info.num_chans) in dcn302_fpu_update_bw_bounding_box()
212 dcn3_02_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn302_fpu_update_bw_bounding_box()
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| /linux-6.3-rc2/drivers/edac/ |
| A D | cell_edac.c | 175 int rc, chanmask, num_chans; in cell_edac_probe() local
200 num_chans = chanmask == 3 ? 2 : 1; in cell_edac_probe()
206 layers[1].size = num_chans; in cell_edac_probe()
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| /linux-6.3-rc2/drivers/firmware/arm_scmi/ |
| A D | raw_mode.h | 22 u8 *channels, int num_chans,
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| A D | raw_mode.c | 1088 u8 *channels, int num_chans) in scmi_raw_mode_setup() argument
1107 if (num_chans > 1) { in scmi_raw_mode_setup()
1110 for (i = 0; i < num_chans; i++) { in scmi_raw_mode_setup()
1166 u8 *channels, int num_chans, in scmi_raw_mode_init() argument
1186 ret = scmi_raw_mode_setup(raw, channels, num_chans); in scmi_raw_mode_init()
1214 if (num_chans > 1) { in scmi_raw_mode_init()
1220 for (i = 0; i < num_chans; i++) { in scmi_raw_mode_init()
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| /linux-6.3-rc2/drivers/firmware/ |
| A D | arm_scpi.c | 249 int num_chans; member
488 scpi_info->num_chans; in scpi_send_message()
859 for (i = 0; i < info->num_chans; i++) in scpi_free_channels()
940 for (; scpi_drvinfo->num_chans < count; scpi_drvinfo->num_chans++) { in scpi_probe()
942 int idx = scpi_drvinfo->num_chans; in scpi_probe()
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| /linux-6.3-rc2/include/linux/ |
| A D | mailbox_controller.h | 78 int num_chans; member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_socbb.h | 69 uint32_t num_chans; member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn10/ |
| A D | dcn10_fpu.c | 120 .num_chans = 2,
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | dcn314_fpu.c | 202 dcn3_14_soc.num_chans = bw_params->num_channels; in dcn314_update_bw_bounding_box_fpu()
204 ASSERT(dcn3_14_soc.num_chans); in dcn314_update_bw_bounding_box_fpu()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | dcn31_fpu.c | 294 .num_chans = 4,
585 dcn3_1_soc.num_chans = bw_params->num_channels; in dcn31_update_bw_bounding_box()
663 dcn3_15_soc.num_chans = bw_params->num_channels; in dcn315_update_bw_bounding_box()
733 dcn3_16_soc.num_chans = bw_params->num_channels; in dcn316_update_bw_bounding_box()
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| /linux-6.3-rc2/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| A D | p2p.c | 643 static s32 brcmf_p2p_escan(struct brcmf_p2p_info *p2p, u32 num_chans, in brcmf_p2p_escan() argument
659 memsize += num_chans * sizeof(__le16); in brcmf_p2p_escan()
717 if (num_chans == SOCIAL_CHAN_CNT || num_chans == (SOCIAL_CHAN_CNT + 1)) in brcmf_p2p_escan()
719 else if (num_chans == AF_PEER_SEARCH_CNT) in brcmf_p2p_escan()
727 if (num_chans == 1) { in brcmf_p2p_escan()
744 sparams->channel_num = cpu_to_le32(num_chans & in brcmf_p2p_escan()
746 for (i = 0; i < num_chans; i++) in brcmf_p2p_escan()
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| /linux-6.3-rc2/drivers/iio/addac/ |
| A D | ad74413r.c | 1228 unsigned int i, num_chans, chan_i; in ad74413r_setup_channels() local
1241 num_chans = ad74413r_channels_map[config->func].num_channels; in ad74413r_setup_channels()
1243 memcpy(channels, chans, num_chans * sizeof(*chans)); in ad74413r_setup_channels()
1245 for (chan_i = 0; chan_i < num_chans; chan_i++) { in ad74413r_setup_channels()
1259 channels += num_chans; in ad74413r_setup_channels()
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