Searched refs:num_entries_per_clk (Results 1 – 3 of 3) sorted by relevance
159 …struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entrie… in dcn32_init_clocks() local184 &num_entries_per_clk->num_dcfclk_levels); in dcn32_init_clocks()189 &num_entries_per_clk->num_socclk_levels); in dcn32_init_clocks()195 &num_entries_per_clk->num_dtbclk_levels); in dcn32_init_clocks()200 &num_entries_per_clk->num_dispclk_levels); in dcn32_init_clocks()204 num_entries_per_clk->num_dtbclk_levels && in dcn32_init_clocks()205 num_entries_per_clk->num_dispclk_levels) in dcn32_init_clocks()710 …struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entrie… in dcn32_get_memclk_states_from_smu() local722 …num_entries_per_clk->num_memclk_levels = num_entries_per_clk->num_memclk_levels ? num_entries_per_… in dcn32_get_memclk_states_from_smu()726 &num_entries_per_clk->num_fclk_levels); in dcn32_get_memclk_states_from_smu()[all …]
113 struct clk_limit_num_entries num_entries_per_clk; member
2089 …int min_dram_speed_mts_offset = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_l… in dcn32_calculate_wm_and_dlg_fpu()
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