| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/ |
| A D | dcn314_hwseq.c | 73 int opp_cnt) in calc_mpc_flow_ctrl_cnt() argument
78 if (opp_cnt >= 2) in calc_mpc_flow_ctrl_cnt()
89 if (opp_cnt == 4) in calc_mpc_flow_ctrl_cnt()
100 int opp_cnt = 1; in update_dsc_on_stream() local
104 opp_cnt++; in update_dsc_on_stream()
119 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
131 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
184 int opp_cnt = 0; in dcn314_update_odm() local
193 if (opp_cnt > 1) in dcn314_update_odm()
196 opp_inst, opp_cnt, in dcn314_update_odm()
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| A D | dcn314_optc.c | 50 static void optc314_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc314_set_odm_combine() argument
56 int mpcc_hactive = h_active / opp_cnt; in optc314_set_odm_combine()
65 if (opp_cnt == 4) { in optc314_set_odm_combine()
84 if (opp_cnt == 2) { in optc314_set_odm_combine()
89 } else if (opp_cnt == 4) { in optc314_set_odm_combine()
102 OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc314_set_odm_combine()
103 optc1->opp_count = opp_cnt; in optc314_set_odm_combine()
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| A D | dcn314_dio_stream_encoder.c | 302 if (is_two_pixels_per_containter(¶m->timing) || param->opp_cnt > 1) { in enc314_stream_encoder_dp_unblank()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_optc.c | 219 static void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc3_set_odm_combine() argument
224 / opp_cnt; in optc3_set_odm_combine()
235 ASSERT(opp_cnt == 2 || opp_cnt == 4); in optc3_set_odm_combine()
240 if (opp_cnt == 2) { in optc3_set_odm_combine()
245 } else if (opp_cnt == 4) { in optc3_set_odm_combine()
256 if (opp_cnt == 2) { in optc3_set_odm_combine()
261 } else if (opp_cnt == 4) { in optc3_set_odm_combine()
273 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc3_set_odm_combine()
274 optc1->opp_count = opp_cnt; in optc3_set_odm_combine()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_optc.c | 43 static void optc31_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc31_set_odm_combine() argument
48 / opp_cnt; in optc31_set_odm_combine()
53 if (opp_cnt == 4) { in optc31_set_odm_combine()
73 if (opp_cnt == 2) { in optc31_set_odm_combine()
78 } else if (opp_cnt == 4) { in optc31_set_odm_combine()
90 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine()
91 optc1->opp_count = opp_cnt; in optc31_set_odm_combine()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/ |
| A D | dcn32_optc.c | 45 static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc32_set_odm_combine() argument
51 int mpcc_hactive = h_active / opp_cnt; in optc32_set_odm_combine()
60 if (opp_cnt == 4) { in optc32_set_odm_combine()
79 if (opp_cnt == 2) { in optc32_set_odm_combine()
84 } else if (opp_cnt == 4) { in optc32_set_odm_combine()
97 OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc32_set_odm_combine()
98 optc1->opp_count = opp_cnt; in optc32_set_odm_combine()
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| A D | dcn32_hwseq.c | 919 int opp_cnt) in calc_mpc_flow_ctrl_cnt() argument
924 if (opp_cnt >= 2) in calc_mpc_flow_ctrl_cnt()
935 if (opp_cnt == 4) in calc_mpc_flow_ctrl_cnt()
946 int opp_cnt = 1; in update_dsc_on_stream() local
950 opp_cnt++; in update_dsc_on_stream()
977 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
1032 int opp_cnt = 0; in dcn32_update_odm() local
1041 if (opp_cnt > 1) in dcn32_update_odm()
1044 opp_inst, opp_cnt, in dcn32_update_odm()
1153 params.opp_cnt = 1; in dcn32_unblank_stream()
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| A D | dcn32_dio_stream_encoder.c | 294 if (is_two_pixels_per_containter(¶m->timing) || param->opp_cnt > 1 in enc32_stream_encoder_dp_unblank()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_optc.c | 181 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc2_set_odm_combine() argument
186 / opp_cnt; in optc2_set_odm_combine()
189 ASSERT(opp_cnt == 2); in optc2_set_odm_combine()
219 optc1->opp_count = opp_cnt; in optc2_set_odm_combine()
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| A D | dcn20_hwseq.c | 636 int opp_cnt) in calc_mpc_flow_ctrl_cnt() argument
641 if (opp_cnt >= 2) in calc_mpc_flow_ctrl_cnt()
652 if (opp_cnt == 4) in calc_mpc_flow_ctrl_cnt()
668 int opp_cnt = 1; in dcn20_enable_stream_timing() local
697 opp_cnt++; in dcn20_enable_stream_timing()
700 if (opp_cnt > 1) in dcn20_enable_stream_timing()
1013 int opp_cnt = 1; in dcn20_update_odm() local
1018 opp_cnt++; in dcn20_update_odm()
1021 if (opp_cnt > 1) in dcn20_update_odm()
2390 params.opp_cnt = 1; in dcn20_unblank_stream()
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| A D | dcn20_optc.h | 107 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
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| A D | dcn20_resource.c | 1245 int opp_cnt = 1; in get_pixel_clock_parameters() local
1252 opp_cnt++; in get_pixel_clock_parameters()
1275 if (opp_cnt == 4) in get_pixel_clock_parameters()
1277 else if (optc2_is_two_pixels_per_containter(&stream->timing) || opp_cnt == 2) in get_pixel_clock_parameters()
1689 int opp_cnt = 1; in dcn20_validate_dsc() local
1692 opp_cnt++; in dcn20_validate_dsc()
1699 + stream->timing.h_border_right) / opp_cnt; in dcn20_validate_dsc()
1706 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
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| A D | dcn20_stream_encoder.c | 482 if (is_two_pixels_per_containter(¶m->timing) || param->opp_cnt > 1) { in enc2_stream_encoder_dp_unblank()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/accessories/ |
| A D | link_dp_cts.c | 482 int opp_cnt = 1; in set_crtc_test_pattern() local
505 opp_cnt++; in set_crtc_test_pattern()
506 dpg_width = width / opp_cnt; in set_crtc_test_pattern()
549 int opp_cnt = 1; in set_crtc_test_pattern() local
553 opp_cnt++; in set_crtc_test_pattern()
555 dpg_width = width / opp_cnt; in set_crtc_test_pattern()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_dpms.c | 784 int opp_cnt = 1; in link_set_dsc_on_stream() local
788 opp_cnt++; in link_set_dsc_on_stream()
796 …am->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; in link_set_dsc_on_stream()
802 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
803 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
813 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
814 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | stream_encoder.h | 102 int opp_cnt; member
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| A D | timing_generator.h | 310 void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,
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