Searched refs:owner_bit (Results 1 – 4 of 4) sorted by relevance
| /linux-6.3-rc2/drivers/net/ethernet/mellanox/mlxsw/ |
| A D | pci.c | 173 static bool mlxsw_pci_elem_hw_owned(struct mlxsw_pci_queue *q, bool owner_bit) in mlxsw_pci_elem_hw_owned() argument
175 return owner_bit != !!(q->consumer_counter & q->count); in mlxsw_pci_elem_hw_owned()
695 bool owner_bit; in mlxsw_pci_cq_sw_cqe_get() local
699 owner_bit = mlxsw_pci_cqe_owner_get(q->u.cq.v, elem); in mlxsw_pci_cq_sw_cqe_get()
700 if (mlxsw_pci_elem_hw_owned(q, owner_bit)) in mlxsw_pci_cq_sw_cqe_get()
808 bool owner_bit; in mlxsw_pci_eq_sw_eqe_get() local
812 owner_bit = mlxsw_pci_eqe_owner_get(elem); in mlxsw_pci_eq_sw_eqe_get()
813 if (mlxsw_pci_elem_hw_owned(q, owner_bit)) in mlxsw_pci_eq_sw_eqe_get()
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| /linux-6.3-rc2/drivers/infiniband/hw/mlx4/ |
| A D | cq.c | 920 u8 owner_bit; in __mlx4_ib_cq_clean() local
950 owner_bit = dest->owner_sr_opcode & MLX4_CQE_OWNER_MASK; in __mlx4_ib_cq_clean()
952 dest->owner_sr_opcode = owner_bit | in __mlx4_ib_cq_clean()
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| /linux-6.3-rc2/drivers/infiniband/hw/mlx5/ |
| A D | cq.c | 1077 u8 owner_bit; in __mlx5_ib_cq_clean() local
1105 owner_bit = dest64->op_own & MLX5_CQE_OWNER_MASK; in __mlx5_ib_cq_clean()
1107 dest64->op_own = owner_bit | in __mlx5_ib_cq_clean()
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| /linux-6.3-rc2/drivers/infiniband/hw/hns/ |
| A D | hns_roce_hw_v2.c | 476 unsigned int owner_bit) in set_ud_wqe() argument
525 hr_reg_write(ud_sq_wqe, UD_SEND_WQE_OWNER, owner_bit); in set_ud_wqe()
578 unsigned int owner_bit) in set_rc_wqe() argument
621 hr_reg_write(rc_sq_wqe, RC_SEND_WQE_OWNER, owner_bit); in set_rc_wqe()
703 unsigned int owner_bit; in hns_roce_v2_post_send() local
740 owner_bit = in hns_roce_v2_post_send()
745 ret = set_rc_wqe(qp, wr, wqe, &sge_idx, owner_bit); in hns_roce_v2_post_send()
747 ret = set_ud_wqe(qp, wr, wqe, &sge_idx, owner_bit); in hns_roce_v2_post_send()
3603 u8 owner_bit; in __hns_roce_v2_cq_clean() local
3626 owner_bit = hr_reg_read(dest, CQE_OWNER); in __hns_roce_v2_cq_clean()
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