| /linux-6.3-rc2/drivers/net/phy/ |
| A D | adin1100.c | 102 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL, in adin_config_aneg()
111 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN); in adin_config_aneg()
120 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H, in adin_config_aneg()
168 return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
180 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN_CRSM_SFT_RST, ADIN_CRSM_SFT_RST_EN); in adin_soft_reset()
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| A D | nxp-c45-tja11xx.c | 557 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_perout_enable()
600 phy_set_bits_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_extts_enable()
771 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PORT_PTP_CONTROL, in nxp_c45_hwtstamp()
779 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_hwtstamp()
894 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_config_intr()
1264 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_CONFIG, in nxp_c45_config_init()
1267 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_LINK_DROP_COUNTER, in nxp_c45_config_init()
1269 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_RX_PREAMBLE_COUNT, in nxp_c45_config_init()
1271 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_TX_PREAMBLE_COUNT, in nxp_c45_config_init()
1273 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_RX_IPG_LENGTH, in nxp_c45_config_init()
[all …]
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| A D | phy-c45.c | 70 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_suspend()
336 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, reg, in genphy_c45_restart_aneg()
1136 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in genphy_c45_fast_retrain()
1141 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_CTRL2, in genphy_c45_fast_retrain()
1147 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FSRT_CSR, in genphy_c45_fast_retrain()
1308 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg()
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| A D | marvell10g.c | 319 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, in mv3310_power_down()
335 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, in mv3310_power_up()
616 err = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MV_AN_21X0_SERDES_CTRL2, in mv2110_set_mactype()
669 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, in mv3310_set_mactype()
1283 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in mv3110_set_wol()
1312 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in mv3110_set_wol()
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| A D | dp83822.c | 406 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
412 phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
467 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
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| A D | mxl-gpy.c | 684 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in gpy_set_wol()
691 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in gpy_set_wol()
698 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in gpy_set_wol()
711 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in gpy_set_wol()
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| A D | dp83td510.c | 68 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_config_intr()
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| A D | marvell-88x2222.c | 73 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_disable()
103 int ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_enable_aneg()
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| A D | adin.c | 727 rc = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset()
848 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN, in adin_cable_test_start()
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| A D | dp83867.c | 475 phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, in dp83867_config_port_mirroring()
869 phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, in dp83867_config_init()
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| A D | dp83tc811.c | 381 phy_set_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_resume()
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| A D | aquantia_main.c | 694 err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_suspend()
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| A D | dp83869.c | 500 return phy_set_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
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| A D | phy.c | 1502 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, in phy_init_eee()
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| /linux-6.3-rc2/include/linux/ |
| A D | phy.h | 1363 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, in phy_set_bits_mmd() function
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