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Searched refs:pipe_plane (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_resource.c1934 int pipe_plane = v->pipe_plane[pipe_idx]; in dcn20_validate_apply_pipe_split_flags() local
1941 if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4) in dcn20_validate_apply_pipe_split_flags()
1943 else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2) in dcn20_validate_apply_pipe_split_flags()
1957 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_2to1; in dcn20_validate_apply_pipe_split_flags()
1961 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_4to1; in dcn20_validate_apply_pipe_split_flags()
1968 v->ODMCombineEnabled[pipe_plane] = in dcn20_validate_apply_pipe_split_flags()
1969 v->ODMCombineEnablePerState[vlevel][pipe_plane]; in dcn20_validate_apply_pipe_split_flags()
1971 if (v->ODMCombineEnabled[pipe_plane] == dm_odm_combine_mode_disabled) { in dcn20_validate_apply_pipe_split_flags()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.c134 which_plane = mode_lib->vba.pipe_plane[which_pipe]; \
264 if (plane_idx == mode_lib->vba.pipe_plane[i]) { in get_pipe_idx()
282 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_det_buffer_size_kbytes()
298 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_is_phantom_pipe()
545 mode_lib->vba.pipe_plane[j] = mode_lib->vba.NumberOfActivePlanes; in fetch_pipe_params()
785 mode_lib->vba.pipe_plane[k] = in fetch_pipe_params()
A Ddisplay_mode_vba.h589 unsigned int pipe_plane[DC__NUM_DPP__MAX]; member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c586 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()
587 phantom_vactive += num_dpp > 1 ? vba->meta_row_height[vba->pipe_plane[pipe_idx]] : 0; in dcn32_set_phantom_stream_timing()
697 …ckChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] <= 0 … in dcn32_assign_subvp_pipe()
698 …ckChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] > 0 && in dcn32_assign_subvp_pipe()
1059 if (vba->ActiveDRAMClockChangeLatencyMargin[vba->pipe_plane[pipe_idx]] > 0 && in subvp_validate_static_schedulability()
1674 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn32_internal_validate_bw()
1772 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn32_internal_validate_bw()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_resource.c1727 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn30_internal_validate_bw()
1796 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn30_internal_validate_bw()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_resource.c872 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn21_fast_validate_bw()

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