Searched refs:pllcr0_reg (Results 1 – 1 of 1) sorted by relevance
63 void __iomem *pllcr0_reg; member76 mult = FIELD_GET(CPG_PLLxCR0_NI, readl(pll_clk->pllcr0_reg)) + 1; in cpg_pll_clk_recalc_rate()110 if (readl(pll_clk->pllcr0_reg) & CPG_PLLxCR0_KICK) in cpg_pll_clk_set_rate()113 cpg_reg_modify(pll_clk->pllcr0_reg, CPG_PLLxCR0_NI, in cpg_pll_clk_set_rate()120 cpg_reg_modify(pll_clk->pllcr0_reg, 0, CPG_PLLxCR0_KICK); in cpg_pll_clk_set_rate()163 pll_clk->pllcr0_reg = base + cr0_offset; in cpg_pll_clk_register()169 cpg_reg_modify(pll_clk->pllcr0_reg, CPG_PLLxCR0_SSMODE, 0); in cpg_pll_clk_register()
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