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Searched refs:prcm_offs (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/arch/arm/mach-omap2/
A Dpowerdomains3xxx_data.c34 .prcm_offs = OMAP3430_IVA2_MOD,
55 .prcm_offs = MPU_MOD,
71 .prcm_offs = MPU_MOD,
97 .prcm_offs = CORE_MOD,
114 .prcm_offs = CORE_MOD,
136 .prcm_offs = CORE_MOD,
264 .prcm_offs = OMAP3430_EMU_MOD,
308 .prcm_offs = MPU_MOD,
320 .prcm_offs = PLL_MOD,
326 .prcm_offs = PLL_MOD,
[all …]
A Dpowerdomains7xx_data.c34 .prcm_offs = DRA7XX_PRM_IVA_INST,
50 .prcm_offs = DRA7XX_PRM_RTC_INST,
75 .prcm_offs = DRA7XX_PRM_IPU_INST,
89 .prcm_offs = DRA7XX_PRM_DSS_INST,
102 .prcm_offs = DRA7XX_PRM_L4PER_INST,
116 .prcm_offs = DRA7XX_PRM_GPU_INST,
141 .prcm_offs = DRA7XX_PRM_CORE_INST,
198 .prcm_offs = DRA7XX_PRM_VPE_INST,
211 .prcm_offs = DRA7XX_PRM_MPU_INST,
257 .prcm_offs = DRA7XX_PRM_EMU_INST,
[all …]
A Dpowerdomains44xx_data.c34 .prcm_offs = OMAP4430_PRM_CORE_INST,
60 .prcm_offs = OMAP4430_PRM_GFX_INST,
77 .prcm_offs = OMAP4430_PRM_ABE_INST,
97 .prcm_offs = OMAP4430_PRM_DSS_INST,
115 .prcm_offs = OMAP4430_PRM_TESLA_INST,
137 .prcm_offs = OMAP4430_PRM_WKUP_INST,
187 .prcm_offs = OMAP4430_PRM_EMU_INST,
203 .prcm_offs = OMAP4430_PRM_MPU_INST,
224 .prcm_offs = OMAP4430_PRM_IVAHD_INST,
248 .prcm_offs = OMAP4430_PRM_CAM_INST,
[all …]
A Dpowerdomains54xx_data.c32 .prcm_offs = OMAP54XX_PRM_CORE_INST,
58 .prcm_offs = OMAP54XX_PRM_ABE_INST,
78 .prcm_offs = OMAP54XX_PRM_COREAON_INST,
87 .prcm_offs = OMAP54XX_PRM_DSS_INST,
139 .prcm_offs = OMAP54XX_PRM_EMU_INST,
155 .prcm_offs = OMAP54XX_PRM_MPU_INST,
184 .prcm_offs = OMAP54XX_PRM_DSP_INST,
206 .prcm_offs = OMAP54XX_PRM_CAM_INST,
223 .prcm_offs = OMAP54XX_PRM_L3INIT_INST,
243 .prcm_offs = OMAP54XX_PRM_GPU_INST,
[all …]
A Dprm33xx.c145 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_next_pwrst()
164 v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_read_pwrst()
175 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_lowpwrstchange()
183 pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_clear_all_prev_pwrst()
196 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_logic_retst()
205 v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_read_logic_pwrst()
237 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_mem_onst()
252 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_mem_retst()
339 pwrdm->context = am33xx_prm_read_reg(pwrdm->prcm_offs, in am33xx_pwrdm_save_context()
352 st = am33xx_prm_read_reg(pwrdm->prcm_offs, in am33xx_pwrdm_restore_context()
[all …]
A Dprm2xxx_3xxx.c118 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, in omap2_pwrdm_set_mem_onst()
131 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, in omap2_pwrdm_set_mem_retst()
143 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, in omap2_pwrdm_read_mem_pwrst()
153 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2_pwrdm_read_mem_retst()
162 omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs, in omap2_pwrdm_set_logic_retst()
179 while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & in omap2_pwrdm_wait_transition()
199 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); in omap2_clkdm_add_wkdep()
207 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); in omap2_clkdm_del_wkdep()
214 return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, in omap2_clkdm_read_wkdep()
233 omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, in omap2_clkdm_clear_all_wkdeps()
A Dpowerdomains43xx_data.c20 .prcm_offs = AM43XX_PRM_GFX_INST,
33 .prcm_offs = AM43XX_PRM_MPU_INST,
54 .prcm_offs = AM43XX_PRM_RTC_INST,
62 .prcm_offs = AM43XX_PRM_WKUP_INST,
74 .prcm_offs = AM43XX_PRM_TAMPER_INST,
82 .prcm_offs = AM43XX_PRM_CEFUSE_INST,
91 .prcm_offs = AM43XX_PRM_PER_INST,
A Dprm44xx.c432 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); in omap4_pwrdm_set_next_pwrst()
440 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_next_pwrst()
477 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); in omap4_pwrdm_set_lowpwrstchange()
486 pwrdm->prcm_offs, OMAP4_PM_PWSTST); in omap4_pwrdm_clear_all_prev_pwrst()
496 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_logic_retst()
510 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_mem_onst()
524 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_mem_retst()
651 pwrdm->prcm_offs, in omap4_pwrdm_wait_transition()
686 pwrdm->prcm_offs, in omap4_pwrdm_save_context()
708 pwrdm->prcm_offs, in omap4_pwrdm_restore_context()
[all …]
A Dpowerdomains33xx_data.c19 .prcm_offs = AM33XX_PRM_GFX_MOD,
50 .prcm_offs = AM33XX_PRM_RTC_MOD,
60 .prcm_offs = AM33XX_PRM_WKUP_MOD,
70 .prcm_offs = AM33XX_PRM_PER_MOD,
113 .prcm_offs = AM33XX_PRM_MPU_MOD,
156 .prcm_offs = AM33XX_PRM_CEFUSE_MOD,
A Dpowerdomains2xxx_data.c28 .prcm_offs = OMAP24XX_DSP_MOD,
43 .prcm_offs = MPU_MOD,
58 .prcm_offs = CORE_MOD,
84 .prcm_offs = OMAP2430_MDM_MOD,
A Dprm3xxx.c541 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap3_pwrdm_set_next_pwrst()
547 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_next_pwrst()
554 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_pwrst()
562 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_pwrst()
569 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_logic_pwrst()
576 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_logic_retst()
583 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_logic_pwrst()
612 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_mem_pwrst()
618 omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); in omap3_pwrdm_clear_all_prev_pwrst()
626 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap3_pwrdm_enable_hdwr_sar()
[all …]
A Dprm2xxx.c136 clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_sleep()
144 clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_wakeup()
169 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap2xxx_pwrdm_set_next_pwrst()
177 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2xxx_pwrdm_read_next_pwrst()
188 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2xxx_pwrdm_read_pwrst()
A Dcm3xxx.c150 clkdm1->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_add_sleepdep()
159 clkdm1->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_del_sleepdep()
191 omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_sleep()
198 omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_wakeup()
208 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_allow_idle()
214 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_deny_idle()
244 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_enable()
247 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_enable()
271 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
281 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
[all …]
A Dpowerdomains2xxx_3xxx_data.c44 .prcm_offs = GFX_MOD,
59 .prcm_offs = WKUP_MOD,
A Dcm2xxx.c173 omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_allow_idle()
179 omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_deny_idle()
190 hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_clk_enable()
205 hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_clk_disable()
A Dpowerdomain.h115 const s16 prcm_offs; member
A Domap_hwmod.c1839 oh->clkdm->pwrdm.ptr->prcm_offs, in _omap4_update_context_lost()
1845 oh->clkdm->pwrdm.ptr->prcm_offs, in _omap4_update_context_lost()
2825 oh->clkdm->pwrdm.ptr->prcm_offs, in _omap4_assert_hardreset()
2852 oh->clkdm->pwrdm.ptr->prcm_offs, in _omap4_deassert_hardreset()
2879 oh->clkdm->pwrdm.ptr->prcm_offs, in _omap4_is_hardreset_asserted()
2918 oh->clkdm->pwrdm.ptr->prcm_offs, in _am33xx_deassert_hardreset()

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