Searched refs:rFPGA0_XA_RFInterfaceOE (Results 1 – 8 of 8) sorted by relevance
| /linux-6.3-rc2/drivers/staging/rtl8192u/ |
| A D | r819xU_phyreg.h | 24 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
|
| A D | r819xU_phy.c | 569 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
579 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef()
1075 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), in rtl8192_SetRFPowerState()
1100 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT(4), in rtl8192_SetRFPowerState()
|
| /linux-6.3-rc2/drivers/staging/rtl8723bs/hal/ |
| A D | rtl8723b_phycfg.c | 315 …pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
319 …pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()
|
| A D | HalPhyRf_8723B.c | 1362 rFPGA0_XA_RFInterfaceOE, in phy_IQCalibrate_8723B()
|
| /linux-6.3-rc2/drivers/staging/rtl8192e/rtl8192e/ |
| A D | r8192E_phy.c | 374 priv->phy_reg_def[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
379 priv->phy_reg_def[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
1269 rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); in rtl92e_set_rf_off()
1325 rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, in _rtl92e_set_rf_power_state()
|
| A D | r8192E_phyreg.h | 67 #define rFPGA0_XA_RFInterfaceOE 0x860 macro
|
| /linux-6.3-rc2/drivers/staging/rtl8712/ |
| A D | rtl871x_mp_phy_regdef.h | 111 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
|
| /linux-6.3-rc2/drivers/staging/rtl8723bs/include/ |
| A D | Hal8192CPhyReg.h | 122 #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ macro
|
Completed in 27 milliseconds