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Searched refs:reset_domain (Results 1 – 19 of 19) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_reset.c120 if (reset_domain->wq) in amdgpu_reset_destroy_reset_domain()
121 destroy_workqueue(reset_domain->wq); in amdgpu_reset_destroy_reset_domain()
123 kvfree(reset_domain); in amdgpu_reset_destroy_reset_domain()
132 if (!reset_domain) { in amdgpu_reset_create_reset_domain()
137 reset_domain->type = type; in amdgpu_reset_create_reset_domain()
138 kref_init(&reset_domain->refcount); in amdgpu_reset_create_reset_domain()
141 if (!reset_domain->wq) { in amdgpu_reset_create_reset_domain()
150 init_rwsem(&reset_domain->sem); in amdgpu_reset_create_reset_domain()
152 return reset_domain; in amdgpu_reset_create_reset_domain()
158 down_write(&reset_domain->sem); in amdgpu_device_lock_reset_domain()
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A Dmxgpu_nv.c286 if (atomic_cmpxchg(&adev->reset_domain->in_gpu_reset, 0, 1) != 0) in xgpu_nv_mailbox_flr_work()
289 down_write(&adev->reset_domain->sem); in xgpu_nv_mailbox_flr_work()
304 atomic_set(&adev->reset_domain->in_gpu_reset, 0); in xgpu_nv_mailbox_flr_work()
305 up_write(&adev->reset_domain->sem); in xgpu_nv_mailbox_flr_work()
351 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_nv_mailbox_rcv_irq()
A Dmxgpu_ai.c262 if (atomic_cmpxchg(&adev->reset_domain->in_gpu_reset, 0, 1) != 0) in xgpu_ai_mailbox_flr_work()
265 down_write(&adev->reset_domain->sem); in xgpu_ai_mailbox_flr_work()
280 atomic_set(&adev->reset_domain->in_gpu_reset, 0); in xgpu_ai_mailbox_flr_work()
281 up_write(&adev->reset_domain->sem); in xgpu_ai_mailbox_flr_work()
321 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_ai_mailbox_rcv_irq()
A Damdgpu_reset.h125 void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain);
127 void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain);
A Damdgpu_xgmi.c300 amdgpu_reset_put_reset_domain(hive->reset_domain); in amdgpu_xgmi_hive_release()
301 hive->reset_domain = NULL; in amdgpu_xgmi_hive_release()
485 if (adev->reset_domain->type != XGMI_HIVE) { in amdgpu_get_xgmi_hive()
486 hive->reset_domain = in amdgpu_get_xgmi_hive()
488 if (!hive->reset_domain) { in amdgpu_get_xgmi_hive()
496 amdgpu_reset_get_reset_domain(adev->reset_domain); in amdgpu_get_xgmi_hive()
497 hive->reset_domain = adev->reset_domain; in amdgpu_get_xgmi_hive()
A Damdgpu_ras_eeprom.c256 down_read(&adev->reset_domain->sem); in __write_table_header()
261 up_read(&adev->reset_domain->sem); in __write_table_header()
467 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
473 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
635 down_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
640 up_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
730 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
736 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
A Damdgpu_xgmi.h45 struct amdgpu_reset_domain *reset_domain; member
A Damdgpu_device.c432 if (down_read_trylock(&adev->reset_domain->sem)) in amdgpu_device_skip_hw_access()
433 up_read(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
435 lockdep_assert_held(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
463 up_read(&adev->reset_domain->sem); in amdgpu_device_rreg()
548 up_read(&adev->reset_domain->sem); in amdgpu_device_wreg()
2337 timeout, adev->reset_domain->wq, in amdgpu_device_init_schedulers()
2484 if (!hive->reset_domain || in amdgpu_device_ip_init()
2493 adev->reset_domain = hive->reset_domain; in amdgpu_device_ip_init()
3687 if (!adev->reset_domain) in amdgpu_device_init()
4081 adev->reset_domain = NULL; in amdgpu_device_fini_sw()
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A Damdgpu_debugfs.c1484 r = down_write_killable(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1513 up_write(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1743 r = down_read_killable(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
1784 up_read(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
1845 ret = down_read_killable(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_read()
1851 up_read(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_read()
1856 ret = down_read_killable(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_read()
1861 up_read(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_read()
1903 ret = down_write_killable(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_write()
1910 up_write(&adev->reset_domain->sem); in amdgpu_reset_dump_register_list_write()
A Dgmc_v9_0.c808 down_read_trylock(&adev->reset_domain->sem)) { in gmc_v9_0_flush_gpu_tlb()
814 up_read(&adev->reset_domain->sem); in gmc_v9_0_flush_gpu_tlb()
922 if (ring->sched.ready && down_read_trylock(&adev->reset_domain->sem)) { in gmc_v9_0_flush_gpu_tlb_pasid()
949 up_read(&adev->reset_domain->sem); in gmc_v9_0_flush_gpu_tlb_pasid()
958 up_read(&adev->reset_domain->sem); in gmc_v9_0_flush_gpu_tlb_pasid()
961 up_read(&adev->reset_domain->sem); in gmc_v9_0_flush_gpu_tlb_pasid()
A Damdgpu_fence.c886 if (amdgpu_reset_domain_schedule(adev->reset_domain, &adev->reset_work)) in gpu_recover_get()
889 *val = atomic_read(&adev->reset_domain->reset_res); in gpu_recover_get()
A Dmxgpu_vi.c564 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_vi_mailbox_rcv_irq()
A Dgmc_v10_0.c348 down_read_trylock(&adev->reset_domain->sem)) { in gmc_v10_0_flush_gpu_tlb()
358 up_read(&adev->reset_domain->sem); in gmc_v10_0_flush_gpu_tlb()
A Damdgpu_amdkfd.c271 amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_amdkfd_gpu_reset()
A Damdgpu.h1053 struct amdgpu_reset_domain *reset_domain; member
A Damdgpu_ras.c3063 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work); in amdgpu_ras_reset_gpu()
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dintel_engine_types.h356 u32 reset_domain; member
A Dintel_engine_cs.c398 u32 reset_domain; in get_reset_domain() local
432 reset_domain = engine_reset_domains[id]; in get_reset_domain()
443 reset_domain = engine_reset_domains[id]; in get_reset_domain()
446 return reset_domain; in get_reset_domain()
484 engine->reset_domain = get_reset_domain(GRAPHICS_VER(gt->i915), in intel_engine_setup()
A Dintel_reset.c329 hw_mask |= engine->reset_domain; in __gen6_reset_engines()
530 reset_mask |= engine->reset_domain; in __gen11_reset_engines()

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