Home
last modified time | relevance | path

Searched refs:rq_regs (Results 1 – 25 of 37) sorted by relevance

12

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_hubp.c139 struct _vcs_dpi_display_rq_regs_st *rq_regs) in hubp21_program_requestor() argument
146 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode, in hubp21_program_requestor()
151 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp21_program_requestor()
157 SWATH_HEIGHT, rq_regs->rq_regs_l.swath_height, in hubp21_program_requestor()
160 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp21_program_requestor()
165 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp21_program_requestor()
173 struct _vcs_dpi_display_rq_regs_st *rq_regs, in hubp21_setup() argument
181 hubp21_program_requestor(hubp, rq_regs); in hubp21_setup()
273 CHUNK_SIZE, &rq_regs.rq_regs_l.chunk_size, in hubp21_validate_dml_output()
279 SWATH_HEIGHT, &rq_regs.rq_regs_l.swath_height, in hubp21_validate_dml_output()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_hubp.c75 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode, in hubp201_program_requestor()
76 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode, in hubp201_program_requestor()
77 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode, in hubp201_program_requestor()
78 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode); in hubp201_program_requestor()
81 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp201_program_requestor()
82 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size, in hubp201_program_requestor()
85 SWATH_HEIGHT, rq_regs->rq_regs_l.swath_height); in hubp201_program_requestor()
88 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp201_program_requestor()
92 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height); in hubp201_program_requestor()
99 struct _vcs_dpi_display_rq_regs_st *rq_regs, in hubp201_setup() argument
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hubp.c208 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp2_program_requestor()
214 SWATH_HEIGHT, rq_regs->rq_regs_l.swath_height, in hubp2_program_requestor()
217 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp2_program_requestor()
231 struct _vcs_dpi_display_rq_regs_st *rq_regs, in hubp2_setup() argument
239 hubp2_program_requestor(hubp, rq_regs); in hubp2_setup()
1110 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in hubp2_read_state_common() local
1300 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in hubp2_read_state() local
1305 CHUNK_SIZE, &rq_regs->rq_regs_l.chunk_size, in hubp2_read_state()
1315 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp2_read_state()
1348 CHUNK_SIZE, &rq_regs.rq_regs_l.chunk_size, in hubp2_validate_dml_output()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_rq_dlg_helpers.c160 dml_print("DML_RQ_DLG_CALC: chunk_size = 0x%0x\n", rq_regs->chunk_size); in print__data_rq_regs_st()
161 dml_print("DML_RQ_DLG_CALC: min_chunk_size = 0x%0x\n", rq_regs->min_chunk_size); in print__data_rq_regs_st()
165 rq_regs->min_meta_chunk_size); in print__data_rq_regs_st()
168 dml_print("DML_RQ_DLG_CALC: swath_height = 0x%0x\n", rq_regs->swath_height); in print__data_rq_regs_st()
171 rq_regs->pte_row_height_linear); in print__data_rq_regs_st()
180 print__data_rq_regs_st(mode_lib, &rq_regs->rq_regs_l); in print__rq_regs_st()
182 print__data_rq_regs_st(mode_lib, &rq_regs->rq_regs_c); in print__rq_regs_st()
183 dml_print("DML_RQ_DLG_CALC: drq_expansion_mode = 0x%0x\n", rq_regs->drq_expansion_mode); in print__rq_regs_st()
184 dml_print("DML_RQ_DLG_CALC: prq_expansion_mode = 0x%0x\n", rq_regs->prq_expansion_mode); in print__rq_regs_st()
185 dml_print("DML_RQ_DLG_CALC: mrq_expansion_mode = 0x%0x\n", rq_regs->mrq_expansion_mode); in print__rq_regs_st()
[all …]
A Ddisplay_rq_dlg_helpers.h41 …regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_data_rq_regs_st *rq_regs);
42 …__rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_rq_regs_st *rq_regs);
A Ddml1_display_rq_dlg_calc.c208 struct _vcs_dpi_display_data_rq_regs_st *rq_regs, in extract_rq_sizing_regs() argument
214 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10; in extract_rq_sizing_regs()
217 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
223 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
233 struct _vcs_dpi_display_rq_regs_st *rq_regs, in dml1_extract_rq_regs() argument
250 rq_regs->drq_expansion_mode = 0; in dml1_extract_rq_regs()
252 rq_regs->drq_expansion_mode = 2; in dml1_extract_rq_regs()
254 rq_regs->prq_expansion_mode = 1; in dml1_extract_rq_regs()
255 rq_regs->mrq_expansion_mode = 1; in dml1_extract_rq_regs()
256 rq_regs->crq_expansion_mode = 1; in dml1_extract_rq_regs()
[all …]
A Ddisplay_mode_lib.h66 display_rq_regs_st *rq_regs,
77 void (*rq_dlg_get_rq_reg_v2)(display_rq_regs_st *rq_regs,
A Ddml1_display_rq_dlg_calc.h35 struct _vcs_dpi_display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hubp.c554 struct _vcs_dpi_display_rq_regs_st *rq_regs) in hubp1_program_requestor() argument
566 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp1_program_requestor()
572 SWATH_HEIGHT, rq_regs->rq_regs_l.swath_height, in hubp1_program_requestor()
575 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp1_program_requestor()
581 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp1_program_requestor()
678 struct _vcs_dpi_display_rq_regs_st *rq_regs, in hubp1_setup() argument
684 hubp1_program_requestor(hubp, rq_regs); in hubp1_setup()
873 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in hubp1_read_state_common() local
1075 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in hubp1_read_state() local
1080 CHUNK_SIZE, &rq_regs->rq_regs_l.chunk_size, in hubp1_read_state()
[all …]
A Ddcn10_hw_sequencer_debug.c205 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in dcn10_get_rq_states() local
212 …pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expan… in dcn10_get_rq_states()
213 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_get_rq_states()
214 rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size, in dcn10_get_rq_states()
215 rq_regs->rq_regs_l.min_meta_chunk_size, rq_regs->rq_regs_l.dpte_group_size, in dcn10_get_rq_states()
216 rq_regs->rq_regs_l.mpte_group_size, rq_regs->rq_regs_l.swath_height, in dcn10_get_rq_states()
217 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_get_rq_states()
218 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_get_rq_states()
219 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_get_rq_states()
220 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_get_rq_states()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_rq_dlg_calc_32.c72 memset(rq_regs, 0, sizeof(*rq_regs)); in dml32_rq_dlg_get_rq_reg()
102 rq_regs->rq_regs_l.min_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
107 rq_regs->rq_regs_c.min_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
115 rq_regs->rq_regs_l.min_meta_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
120 rq_regs->rq_regs_c.min_meta_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
155 rq_regs->drq_expansion_mode = 0; in dml32_rq_dlg_get_rq_reg()
157 rq_regs->drq_expansion_mode = 2; in dml32_rq_dlg_get_rq_reg()
159 rq_regs->prq_expansion_mode = 1; in dml32_rq_dlg_get_rq_reg()
160 rq_regs->mrq_expansion_mode = 1; in dml32_rq_dlg_get_rq_reg()
161 rq_regs->crq_expansion_mode = 1; in dml32_rq_dlg_get_rq_reg()
[all …]
A Ddisplay_rq_dlg_calc_32.h44 void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hubp.c434 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in hubp3_read_state() local
439 CHUNK_SIZE, &rq_regs->rq_regs_l.chunk_size, in hubp3_read_state()
440 MIN_CHUNK_SIZE, &rq_regs->rq_regs_l.min_chunk_size, in hubp3_read_state()
441 META_CHUNK_SIZE, &rq_regs->rq_regs_l.meta_chunk_size, in hubp3_read_state()
443 DPTE_GROUP_SIZE, &rq_regs->rq_regs_l.dpte_group_size, in hubp3_read_state()
444 SWATH_HEIGHT, &rq_regs->rq_regs_l.swath_height, in hubp3_read_state()
448 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp3_read_state()
449 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp3_read_state()
453 SWATH_HEIGHT_C, &rq_regs->rq_regs_c.swath_height, in hubp3_read_state()
462 struct _vcs_dpi_display_rq_regs_st *rq_regs, in hubp3_setup() argument
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20v2.c166 display_data_rq_regs_st *rq_regs, in extract_rq_sizing_regs() argument
175 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
181 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
190 display_rq_regs_st *rq_regs, in extract_rq_regs() argument
213 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
215 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
217 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
218 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
219 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
770 display_rq_regs_st *rq_regs, in dml20v2_rq_dlg_get_rq_reg() argument
[all …]
A Ddisplay_rq_dlg_calc_20.c166 display_data_rq_regs_st *rq_regs, in extract_rq_sizing_regs() argument
175 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
181 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
190 display_rq_regs_st *rq_regs, in extract_rq_regs() argument
213 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
215 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
217 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
218 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
219 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
770 display_rq_regs_st *rq_regs, in dml20_rq_dlg_get_rq_reg() argument
[all …]
A Ddisplay_rq_dlg_calc_20.h45 display_rq_regs_st *rq_regs,
A Ddisplay_rq_dlg_calc_20v2.h45 display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c143 display_data_rq_regs_st *rq_regs, in extract_rq_sizing_regs() argument
152 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
158 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
168 display_rq_regs_st *rq_regs, in extract_rq_regs() argument
193 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
195 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
197 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
198 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
199 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
815 display_rq_regs_st *rq_regs, in dml21_rq_dlg_get_rq_reg() argument
[all …]
A Ddisplay_rq_dlg_calc_21.h46 display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c92 display_data_rq_regs_st *rq_regs, in extract_rq_sizing_regs() argument
101 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
107 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
116 display_rq_regs_st *rq_regs, in extract_rq_regs() argument
139 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
141 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
143 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
144 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
145 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
790 display_rq_regs_st *rq_regs, in dml30_rq_dlg_get_rq_reg() argument
[all …]
A Ddisplay_rq_dlg_calc_30.h43 display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c98 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
104 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
132 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
134 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
136 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
137 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
138 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
154 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
773 memset(rq_regs, 0, sizeof(*rq_regs)); in dml31_rq_dlg_get_rq_reg()
775 extract_rq_regs(mode_lib, rq_regs, &rq_param); in dml31_rq_dlg_get_rq_reg()
[all …]
A Ddisplay_rq_dlg_calc_31.h43 display_rq_regs_st *rq_regs,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_rq_dlg_calc_314.c186 rq_regs->min_chunk_size = 0; in extract_rq_sizing_regs()
192 rq_regs->min_meta_chunk_size = 0; in extract_rq_sizing_regs()
220 rq_regs->drq_expansion_mode = 0; in extract_rq_regs()
222 rq_regs->drq_expansion_mode = 2; in extract_rq_regs()
224 rq_regs->prq_expansion_mode = 1; in extract_rq_regs()
225 rq_regs->mrq_expansion_mode = 1; in extract_rq_regs()
226 rq_regs->crq_expansion_mode = 1; in extract_rq_regs()
242 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
860 memset(rq_regs, 0, sizeof(*rq_regs)); in dml314_rq_dlg_get_rq_reg()
862 extract_rq_regs(mode_lib, rq_regs, &rq_param); in dml314_rq_dlg_get_rq_reg()
[all …]
A Ddisplay_rq_dlg_calc_314.h44 display_rq_regs_st *rq_regs,

Completed in 50 milliseconds

12