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/linux-6.3-rc2/arch/arm/mach-omap2/
A Dvoltagedomains54xx_data.c35 .scalable = true,
46 .scalable = true,
57 .scalable = true,
A Dvoltagedomains44xx_data.c49 .scalable = true,
60 .scalable = true,
71 .scalable = true,
A Dvoltagedomains3xxx_data.c50 .scalable = true,
61 .scalable = true,
A Dvoltage.h64 bool scalable; member
A Dvoltage.c249 if (!voltdm->scalable) in omap_voltage_late_init()
/linux-6.3-rc2/drivers/iommu/intel/
A DKconfig88 bool "Enable Intel IOMMU scalable mode by default"
91 Selecting this option will enable by default the scalable mode if
92 hardware presents the capability. The scalable mode is defined in
93 VT-d 3.0. The scalable mode capability could be checked by reading
95 is not selected, scalable mode support could also be enabled by
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dmstar,msc313-cpupll.yaml13 The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable
/linux-6.3-rc2/Documentation/mm/damon/
A Dindex.rst15 - *scalable* (the upper-bound of the overhead is in constant range regardless
/linux-6.3-rc2/fs/ceph/
A DKconfig14 scalable file system designed to provide high performance,
/linux-6.3-rc2/Documentation/filesystems/
A Dceph.rst34 system extremely efficient and scalable.
37 in-memory cache above the file namespace that is extremely scalable,
46 independent metadata servers, allowing scalable concurrent access.
A Dpath-lookup.txt29 slows things down. It is not scalable because many parallel applications that
/linux-6.3-rc2/Documentation/mm/
A Dnuma.rst38 lives interesting. Rather, this architecture is a means to provide scalable
39 memory bandwidth. However, to achieve scalable memory bandwidth, system and
/linux-6.3-rc2/Documentation/arm64/
A Dsve.rst77 * Whenever SVE scalable register values (Zn, Pn, FFR) are exchanged in memory
162 * Each scalable register (Zn, Pn, FFR) is stored in an endianness-invariant
/linux-6.3-rc2/Documentation/locking/
A Drobust-futexes.rst28 method makes futexes very lightweight and scalable.
/linux-6.3-rc2/tools/memory-model/Documentation/
A Dsimple.txt107 in a naturally scalable data structure.
/linux-6.3-rc2/Documentation/hwmon/
A Dpmbus-core.rst33 To make device specific extensions as scalable as possible, and to avoid having
/linux-6.3-rc2/Documentation/x86/
A Dsva.rst280 https://01.org/blogs/2019/assignable-interfaces-intel-scalable-i/o-virtualization-linux
A Dresctrl.rst1439 …16124958/https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-updat…
/linux-6.3-rc2/Documentation/process/
A D1.Intro.rst59 robust, efficient, and scalable solution for almost any situation.
/linux-6.3-rc2/Documentation/doc-guide/
A Dsphinx.rst435 ``kernel-image`` directives. E.g. to insert a figure with a scalable
/linux-6.3-rc2/Documentation/virt/kvm/x86/
A Dmmu.rst447 shadow pages, and is made more scalable with a similar technique.
/linux-6.3-rc2/Documentation/RCU/
A DRTFP.txt1672 ,title = {Portability events: a programming model for scalable system infrastructures}
1735 ,Title="{[PATCH 3/7]} barrier: a scalable synchonisation barrier"
2135 ,Title="Re: [{RFC}, {PATCH}] v4 scalable classic {RCU} implementation"
/linux-6.3-rc2/net/ipv4/
A DKconfig581 See http://www.deneholme.net/tom/scalable/
/linux-6.3-rc2/Documentation/RCU/Design/Memory-Ordering/
A DTree-RCU-Memory-Ordering.rst445 | more scalable than a “big bang” all-at-once grace-period start could |
/linux-6.3-rc2/Documentation/RCU/Design/Requirements/
A DRequirements.rst21 primitives can be exceedingly fast and scalable. In addition, updaters
1020 must therefore use scalable locking designs.
2307 which means that RCU must be extremely scalable. Algorithms that involve

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