| /linux-6.3-rc2/drivers/mmc/host/ |
| A D | sdhci-milbeaut.c | 94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
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| A D | sdhci-pci-arasan.c | 111 sdhci_writew(host, data, PHY_DAT_REG); in arasan_phy_write()
112 sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG); in arasan_phy_write()
120 sdhci_writew(host, 0, PHY_DAT_REG); in arasan_phy_read()
121 sdhci_writew(host, offset, PHY_ADDR_REG); in arasan_phy_read()
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| A D | sdhci-pci-o2micro.c | 202 sdhci_writew(host, reg, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
335 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
340 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
361 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
403 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
550 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
555 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
569 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
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| A D | sdhci-pci-gli.c | 258 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
278 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
453 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
636 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
827 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
849 sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_enable()
875 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_post_disable()
998 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1016 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1027 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
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| A D | sdhci-sprd.c | 170 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
179 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
225 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
281 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
360 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
527 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
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| A D | sdhci.c | 135 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
345 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
1097 sdhci_writew(host, in sdhci_set_block_info()
1107 sdhci_writew(host, 0, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1488 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
1983 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2006 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2028 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2038 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
2735 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
[all …]
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| A D | sdhci-of-at91.c | 78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
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| A D | sdhci_f_sdh30.c | 71 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
180 sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
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| A D | sdhci-s3c.c | 380 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
389 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
399 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
415 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
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| A D | sdhci-pci-dwc-mshc.c | 70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
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| A D | sdhci-pxav2.c | 147 sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); in pxav1_request_done()
148 sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), in pxav1_request_done()
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| A D | sdhci-brcmstb.c | 89 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
123 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
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| A D | sdhci-xenon.c | 219 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
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| A D | sdhci.h | 676 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
723 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
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| A D | sdhci-of-dwcmshc.c | 179 sdhci_writew(host, ctrl, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); in dwcmshc_set_uhs_signaling()
184 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
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| A D | sdhci-xenon-phy.c | 611 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
635 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
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| A D | sdhci-acpi.c | 552 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
556 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
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| A D | sdhci-tegra.c | 268 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
1203 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in tegra_cqhci_writel()
1253 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_enable()
1336 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_post_disable()
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| A D | sdhci-st.c | 304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
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| A D | sdhci-pxav3.c | 292 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
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| A D | sdhci-of-aspeed.c | 249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
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| A D | sdhci-msm.c | 1384 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1767 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
2355 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
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| A D | sdhci-pci-core.c | 1639 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1643 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
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| A D | sdhci-of-arasan.c | 906 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
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| A D | sdhci-esdhc-imx.c | 1563 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in esdhc_cqe_enable()
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