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Searched refs:sdma_cntl (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dsi_dma.c592 u32 sdma_cntl; in si_dma_set_trap_irq_state() local
598 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
599 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
600 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
603 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
604 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
605 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
615 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
616 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
620 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
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A Dsdma_v2_4.c1002 u32 sdma_cntl; in sdma_v2_4_set_trap_irq_state() local
1008 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v2_4_set_trap_irq_state()
1009 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1010 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
1013 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v2_4_set_trap_irq_state()
1014 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
1015 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
1025 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1026 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in sdma_v2_4_set_trap_irq_state()
1030 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
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A Dsdma_v3_0.c1336 u32 sdma_cntl; in sdma_v3_0_set_trap_irq_state() local
1342 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v3_0_set_trap_irq_state()
1343 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1344 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
1347 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in sdma_v3_0_set_trap_irq_state()
1348 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
1349 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
1359 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1360 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in sdma_v3_0_set_trap_irq_state()
1364 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
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A Dcik_sdma.c1109 u32 sdma_cntl; in cik_sdma_set_trap_irq_state() local
1115 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1116 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1117 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1120 sdma_cntl = RREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET); in cik_sdma_set_trap_irq_state()
1121 sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1122 WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1132 sdma_cntl &= ~SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
1133 WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl); in cik_sdma_set_trap_irq_state()
1137 sdma_cntl |= SDMA0_CNTL__TRAP_ENABLE_MASK; in cik_sdma_set_trap_irq_state()
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A Dsdma_v6_0.c1424 u32 sdma_cntl; in sdma_v6_0_set_trap_irq_state() local
1429 sdma_cntl = RREG32(reg_offset); in sdma_v6_0_set_trap_irq_state()
1430 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v6_0_set_trap_irq_state()
1432 WREG32(reg_offset, sdma_cntl); in sdma_v6_0_set_trap_irq_state()
A Dsdma_v5_2.c1401 u32 sdma_cntl; in sdma_v5_2_set_trap_irq_state() local
1405 sdma_cntl = RREG32(reg_offset); in sdma_v5_2_set_trap_irq_state()
1406 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_2_set_trap_irq_state()
1408 WREG32(reg_offset, sdma_cntl); in sdma_v5_2_set_trap_irq_state()
A Dsdma_v5_0.c1550 u32 sdma_cntl; in sdma_v5_0_set_trap_irq_state() local
1557 sdma_cntl = RREG32(reg_offset); in sdma_v5_0_set_trap_irq_state()
1558 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_0_set_trap_irq_state()
1560 WREG32(reg_offset, sdma_cntl); in sdma_v5_0_set_trap_irq_state()
A Dsdma_v4_0.c1994 u32 sdma_cntl; in sdma_v4_0_set_trap_irq_state() local
1996 sdma_cntl = RREG32_SDMA(type, mmSDMA0_CNTL); in sdma_v4_0_set_trap_irq_state()
1997 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v4_0_set_trap_irq_state()
1999 WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl); in sdma_v4_0_set_trap_irq_state()

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