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/linux-6.3-rc2/arch/arm64/boot/dts/microchip/
A Dsparx5_pcb135_board.dtsi377 phys = <&serdes 13>;
384 phys = <&serdes 13>;
391 phys = <&serdes 13>;
398 phys = <&serdes 13>;
405 phys = <&serdes 14>;
412 phys = <&serdes 14>;
419 phys = <&serdes 14>;
426 phys = <&serdes 14>;
433 phys = <&serdes 15>;
440 phys = <&serdes 15>;
[all …]
A Dsparx5_pcb134_board.dtsi719 phys = <&serdes 13>;
729 phys = <&serdes 14>;
738 phys = <&serdes 15>;
747 phys = <&serdes 16>;
756 phys = <&serdes 17>;
765 phys = <&serdes 18>;
774 phys = <&serdes 19>;
783 phys = <&serdes 20>;
792 phys = <&serdes 21>;
801 phys = <&serdes 22>;
[all …]
/linux-6.3-rc2/arch/arm64/boot/dts/amd/
A Damd-seattle-xgbe-b.dtsi48 amd,serdes-blwc = <1>, <1>, <0>;
49 amd,serdes-cdr-rate = <2>, <2>, <7>;
50 amd,serdes-pq-skew = <10>, <10>, <18>;
51 amd,serdes-tx-amp = <0>, <0>, <0>;
52 amd,serdes-dfe-tap-config = <3>, <3>, <3>;
53 amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
74 amd,serdes-blwc = <1>, <1>, <0>;
75 amd,serdes-cdr-rate = <2>, <2>, <7>;
76 amd,serdes-pq-skew = <10>, <10>, <18>;
77 amd,serdes-tx-amp = <0>, <0>, <0>;
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/phy/
A Dti,phy-am654-serdes.yaml4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#
19 - ti,phy-am654-serdes
26 - const: serdes
46 include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes lane function.
48 ti,serdes-clk:
79 - ti,serdes-clk
87 #include <dt-bindings/phy/phy-am654-serdes.h>
89 serdes0: serdes@900000 {
90 compatible = "ti,phy-am654-serdes";
92 reg-names = "serdes";
[all …]
A Dmicrochip,lan966x-serdes.yaml4 $id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
27 pattern: "^serdes@[0-9a-f]+$"
30 const: microchip,lan966x-serdes
42 dt-bindings/phy/phy-lan966x-serdes.
53 serdes: serdes@e2004010 {
54 compatible = "microchip,lan966x-serdes";
A Dmicrochip,sparx5-serdes.yaml4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
67 pattern: "^serdes@[0-9a-f]+$"
70 const: microchip,sparx5-serdes
78 - The main serdes input port
93 serdes: serdes@10808000 {
94 compatible = "microchip,sparx5-serdes";
A Dmscc,vsc7514-serdes.yaml4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
35 - mscc,vsc7514-serdes
42 dt-bindings/phy/phy-ocelot-serdes.h
53 serdes: serdes {
54 compatible = "mscc,vsc7514-serdes";
A Drenesas,r8a779f0-ether-serdes.yaml4 $id: http://devicetree.org/schemas/phy/renesas,r8a779f0-ether-serdes.yaml#
14 const: renesas,r8a779f0-ether-serdes
48 compatible = "renesas,r8a779f0-ether-serdes";
/linux-6.3-rc2/Documentation/devicetree/bindings/net/
A Damd-xgbe.txt46 - amd,serdes-cdr-rate: CDR rate speed selection
47 - amd,serdes-pq-skew: PQ (data sampling) skew
48 - amd,serdes-tx-amp: TX amplitude boost
49 - amd,serdes-dfe-tap-config: DFE taps available to run
50 - amd,serdes-dfe-tap-enable: DFE taps to enable
70 amd,serdes-blwc = <1>, <1>, <0>;
71 amd,serdes-cdr-rate = <2>, <2>, <7>;
72 amd,serdes-pq-skew = <10>, <10>, <30>;
73 amd,serdes-tx-amp = <15>, <15>, <10>;
74 amd,serdes-dfe-tap-config = <3>, <3>, <1>;
[all …]
A Dhisilicon-hns-dsaf.txt18 serdes-syscon in port node does not exist). It is recommended using
19 serdes-syscon rather than this address.
40 - serdes-syscon: is syscon handle for SerDes register.
81 serdes-syscon = <&serdes>;
87 serdes-syscon = <&serdes>;
A Dmicrochip,sparx5-switch.yaml157 phys = <&serdes 13>;
166 phys = <&serdes 29>;
175 phys = <&serdes 30>;
184 phys = <&serdes 31>;
193 phys = <&serdes 32>;
203 phys = <&serdes 0>;
/linux-6.3-rc2/arch/arm/boot/dts/
A Dlan966x-pcb8290.dts11 #include "dt-bindings/phy/phy-lan966x-serdes.h"
120 phys = <&serdes 0 SERDES6G(1)>;
128 phys = <&serdes 1 SERDES6G(1)>;
136 phys = <&serdes 2 SERDES6G(1)>;
144 phys = <&serdes 3 SERDES6G(1)>;
152 phys = <&serdes 4 SERDES6G(2)>;
160 phys = <&serdes 5 SERDES6G(2)>;
168 phys = <&serdes 6 SERDES6G(2)>;
176 phys = <&serdes 7 SERDES6G(2)>;
180 &serdes {
A Dlan966x-kontron-kswitch-d10-mmt.dtsi8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
128 phys = <&serdes 0 CU(0)>;
135 phys = <&serdes 1 CU(1)>;
142 phys = <&serdes 4 SERDES6G(2)>;
149 phys = <&serdes 5 SERDES6G(2)>;
156 phys = <&serdes 6 SERDES6G(2)>;
163 phys = <&serdes 7 SERDES6G(2)>;
169 &serdes {
A Dlan966x-pcb8309.dts7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
169 phys = <&serdes 0 CU(0)>;
176 phys = <&serdes 1 CU(1)>;
184 phys = <&serdes 2 SERDES6G(0)>;
192 phys = <&serdes 3 SERDES6G(1)>;
196 &serdes {
A Dlan966x-pcb8291.dts7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
112 phys = <&serdes 0 CU(0)>;
119 phys = <&serdes 1 CU(1)>;
123 &serdes {
A Dlan966x-kontron-kswitch-d10-mmt-8g.dts26 phys = <&serdes 2 SERDES6G(0)>;
34 phys = <&serdes 3 SERDES6G(1)>;
/linux-6.3-rc2/drivers/phy/qualcomm/
A Dphy-qcom-qmp-pcie-msm8996.c216 void __iomem *serdes; member
341 void __iomem *serdes = qphy->serdes; in qmp_pcie_msm8996_serdes_init() local
351 qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL], in qmp_pcie_msm8996_serdes_init()
370 void __iomem *serdes = qphy->serdes; in qmp_pcie_msm8996_com_init() local
422 void __iomem *serdes = qphy->serdes; in qmp_pcie_msm8996_com_exit() local
432 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], in qmp_pcie_msm8996_com_exit()
722 qphy->serdes = serdes; in qmp_pcie_msm8996_create()
786 void __iomem *serdes; in qmp_pcie_msm8996_probe() local
802 serdes = devm_platform_ioremap_resource(pdev, 0); in qmp_pcie_msm8996_probe()
803 if (IS_ERR(serdes)) in qmp_pcie_msm8996_probe()
[all …]
A Dphy-qcom-qmp-ufs.c673 u16 serdes; member
725 void __iomem *serdes; member
786 .serdes = 0,
795 .serdes = 0,
832 .serdes = sm8350_ufsphy_serdes,
864 .serdes = sdm845_ufsphy_serdes,
1092 void __iomem *serdes = qmp->serdes; in qmp_ufs_serdes_init() local
1094 qmp_ufs_configure(serdes, tbls->serdes, tbls->serdes_num); in qmp_ufs_serdes_init()
1409 if (IS_ERR(qmp->serdes)) in qmp_ufs_parse_dt_legacy()
1410 return PTR_ERR(qmp->serdes); in qmp_ufs_parse_dt_legacy()
[all …]
A Dphy-qcom-qmp-pcie.c1738 u16 serdes; member
1815 void __iomem *serdes; member
1900 .serdes = 0,
1910 .serdes = 0x1000,
1924 .serdes = ipq8074_pcie_serdes_tbl,
1978 .serdes = ipq6018_pcie_serdes_tbl,
2575 void __iomem *serdes = qmp->serdes; in qmp_pcie_init_registers() local
2587 qmp_pcie_configure(serdes, tbls->serdes, tbls->serdes_num); in qmp_pcie_init_registers()
2930 if (IS_ERR(qmp->serdes)) in qmp_pcie_parse_dt_legacy()
2931 return PTR_ERR(qmp->serdes); in qmp_pcie_parse_dt_legacy()
[all …]
/linux-6.3-rc2/arch/mips/boot/dts/mscc/
A Docelot_pcb120.dts8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
99 phys = <&serdes 4 SERDES1G(2)>;
106 phys = <&serdes 5 SERDES1G(5)>;
113 phys = <&serdes 6 SERDES1G(3)>;
120 phys = <&serdes 9 SERDES1G(4)>;
/linux-6.3-rc2/drivers/phy/mscc/
A Dphy-ocelot-serdes.c60 static int serdes_init_s6g(struct regmap *regmap, u8 serdes, int mode) in serdes_init_s6g() argument
89 ret = serdes_update_mcb_s6g(regmap, serdes); in serdes_init_s6g()
146 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
222 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
230 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
244 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
292 static int serdes_init_s1g(struct regmap *regmap, u8 serdes) in serdes_init_s1g() argument
296 ret = serdes_update_mcb_s1g(regmap, serdes); in serdes_init_s1g()
318 ret = serdes_commit_mcb_s1g(regmap, serdes); in serdes_init_s1g()
329 ret = serdes_commit_mcb_s1g(regmap, serdes); in serdes_init_s1g()
/linux-6.3-rc2/arch/arm64/boot/dts/marvell/
A Dcn9132-db.dtsi107 /* Generic PHY, providing serdes lanes */
157 /* Generic PHY, providing serdes lanes */
167 /* Generic PHY, providing serdes lanes */
176 /* Generic PHY, providing serdes lanes */
223 /* Generic PHY, providing serdes lanes */
A Dcn9130-crb-B.dts16 /* Generic PHY, providing serdes lanes */
29 /* Generic PHY, providing serdes lanes */
/linux-6.3-rc2/drivers/phy/marvell/
A DKconfig36 shared serdes PHYs on Marvell Armada 3700. Its serdes lanes can be
55 shared serdes PHYs on Marvell Armada 38x. Its serdes lanes can be
66 shared serdes PHYs on Marvell Armada 7k/8k (in the CP110). Its serdes
/linux-6.3-rc2/drivers/net/ethernet/microchip/lan966x/
A Dlan966x_phylink.c33 if (port->serdes) { in lan966x_phylink_mac_prepare()
34 err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET, in lan966x_phylink_mac_prepare()
63 phy_set_speed(port->serdes, speed); in lan966x_phylink_mac_link_up()

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