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Searched refs:set_drr (Results 1 – 25 of 27) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_init.c61 .set_drr = dcn10_set_drr,
A Ddcn10_hw_sequencer.c1051 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn10_reset_back_end_for_pipe()
1052 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn10_reset_back_end_for_pipe()
3161 if (pipe_ctx[i]->stream_res.tg->funcs->set_drr) in dcn10_set_drr()
3162 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in dcn10_set_drr()
A Ddcn10_optc.c1563 .set_drr = optc1_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_init.c63 .set_drr = dcn10_set_drr,
A Ddcn201_optc.c169 .set_drr = optc1_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn301/
A Ddcn301_init.c69 .set_drr = dcn10_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_init.c64 .set_drr = dcn10_set_drr,
A Ddcn20_optc.c530 .set_drr = optc1_set_drr,
A Ddcn20_hwseq.c778 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_enable_stream_timing()
779 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_enable_stream_timing()
2490 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_reset_back_end_for_pipe()
2491 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_reset_back_end_for_pipe()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_init.c64 .set_drr = dcn10_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_init.c65 .set_drr = dcn10_set_drr,
A Ddcn30_optc.c343 .set_drr = optc1_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_init.c67 .set_drr = dcn10_set_drr,
A Ddcn31_optc.c266 .set_drr = optc31_set_drr,
A Ddcn31_hwseq.c555 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
556 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/
A Ddcn314_init.c69 .set_drr = dcn10_set_drr,
A Ddcn314_optc.c228 .set_drr = optc31_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_init.c65 .set_drr = dcn10_set_drr,
A Ddcn32_optc.c292 .set_drr = optc32_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce80/
A Ddce80_timing_generator.c211 .set_drr = dce110_timing_generator_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce60/
A Ddce60_timing_generator.c230 .set_drr = dce110_timing_generator_set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dtiming_generator.h238 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/inc/
A Dhw_sequencer.h117 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_hw_sequencer.c1546 if (pipe_ctx->stream_res.tg->funcs->set_drr) in apply_single_controller_ctx_to_hw()
1547 pipe_ctx->stream_res.tg->funcs->set_drr( in apply_single_controller_ctx_to_hw()
1897 static void set_drr(struct pipe_ctx **pipe_ctx, in set_drr() function
1915 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in set_drr()
3133 .set_drr = set_drr,
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce120/
A Ddce120_timing_generator.c1192 .set_drr = dce120_timing_generator_set_drr,

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