Searched refs:set_rate_and_parent (Results 1 – 11 of 11) sorted by relevance
| /linux-6.3-rc2/drivers/clk/ti/ |
| A D | dpll.c | 31 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
56 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
69 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
110 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
122 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
134 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
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| /linux-6.3-rc2/drivers/clk/qcom/ |
| A D | clk-rcg2.c | 493 .set_rate_and_parent = clk_rcg2_set_rate_and_parent,
506 .set_rate_and_parent = clk_rcg2_set_floor_rate_and_parent,
641 .set_rate_and_parent = clk_edp_pixel_set_rate_and_parent,
699 .set_rate_and_parent = clk_byte_set_rate_and_parent,
769 .set_rate_and_parent = clk_byte2_set_rate_and_parent,
860 .set_rate_and_parent = clk_pixel_set_rate_and_parent,
974 .set_rate_and_parent = clk_gfx3d_set_rate_and_parent,
1153 .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
1415 .set_rate_and_parent = clk_rcg2_dp_set_rate_and_parent,
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| A D | clk-rcg.c | 862 .set_rate_and_parent = clk_rcg_bypass2_set_rate_and_parent,
874 .set_rate_and_parent = clk_rcg_pixel_set_rate_and_parent,
886 .set_rate_and_parent = clk_rcg_esc_set_rate_and_parent,
910 .set_rate_and_parent = clk_dyn_rcg_set_rate_and_parent,
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| A D | clk-regmap-mux-div.c | 227 .set_rate_and_parent = mux_div_set_rate_and_parent,
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| /linux-6.3-rc2/drivers/clk/tegra/ |
| A D | clk-tegra20-emc.c | 220 .set_rate_and_parent = emc_set_rate_and_parent,
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| /linux-6.3-rc2/drivers/clk/ |
| A D | clk-composite.c | 308 clk_composite_ops->set_rate_and_parent = in __clk_hw_register_composite()
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| A D | clk.c | 2295 if (core->ops->set_rate_and_parent) { in clk_change_rate()
2297 core->ops->set_rate_and_parent(core->hw, core->new_rate, in clk_change_rate()
3753 if (core->ops->set_rate_and_parent && in __clk_core_init()
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| /linux-6.3-rc2/drivers/clk/mmp/ |
| A D | clk-mix.c | 431 .set_rate_and_parent = mmp_clk_mix_set_rate_and_parent,
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| /linux-6.3-rc2/Documentation/driver-api/ |
| A D | clk.rst | 90 int (*set_rate_and_parent)(struct clk_hw *hw,
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| /linux-6.3-rc2/drivers/clk/microchip/ |
| A D | clk-core.c | 553 .set_rate_and_parent = roclk_set_rate_and_parent,
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| /linux-6.3-rc2/include/linux/ |
| A D | clk-provider.h | 255 int (*set_rate_and_parent)(struct clk_hw *hw, member
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