Searched refs:set_wptr (Results 1 – 25 of 37) sorted by relevance
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | radeon_asic.c | 194 .set_wptr = &r100_gfx_set_wptr,
344 .set_wptr = &r100_gfx_set_wptr,
358 .set_wptr = &r100_gfx_set_wptr,
915 .set_wptr = &r600_gfx_set_wptr,
928 .set_wptr = &r600_dma_set_wptr,
1013 .set_wptr = &uvd_v1_0_set_wptr,
1212 .set_wptr = &uvd_v1_0_set_wptr,
1319 .set_wptr = &r600_gfx_set_wptr,
1332 .set_wptr = &r600_dma_set_wptr,
1657 .set_wptr = &uvd_v1_0_set_wptr,
[all …]
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| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_ring.h | 173 void (*set_wptr)(struct amdgpu_ring *ring); member
301 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
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| A D | jpeg_v2_5.c | 647 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
677 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
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| A D | vce_v3_0.c | 928 .set_wptr = vce_v3_0_ring_set_wptr,
952 .set_wptr = vce_v3_0_ring_set_wptr,
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| A D | uvd_v6_0.c | 1551 .set_wptr = uvd_v6_0_ring_set_wptr,
1577 .set_wptr = uvd_v6_0_ring_set_wptr,
1606 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
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| A D | jpeg_v3_0.c | 565 .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
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| A D | vcn_v2_5.c | 1564 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1595 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1695 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
1725 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
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| A D | jpeg_v4_0.c | 583 .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
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| A D | vce_v2_0.c | 641 .set_wptr = vce_v2_0_ring_set_wptr,
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| A D | sdma_v4_0.c | 2300 .set_wptr = sdma_v4_0_ring_set_wptr,
2337 .set_wptr = sdma_v4_0_ring_set_wptr,
2370 .set_wptr = sdma_v4_0_page_ring_set_wptr,
2403 .set_wptr = sdma_v4_0_page_ring_set_wptr,
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| A D | jpeg_v1_0.c | 555 .set_wptr = jpeg_v1_0_decode_ring_set_wptr,
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| A D | uvd_v3_1.c | 186 .set_wptr = uvd_v3_1_ring_set_wptr,
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| A D | uvd_v4_2.c | 775 .set_wptr = uvd_v4_2_ring_set_wptr,
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| A D | jpeg_v2_0.c | 768 .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
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| A D | uvd_v5_0.c | 883 .set_wptr = uvd_v5_0_ring_set_wptr,
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| A D | vcn_v3_0.c | 1744 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
1905 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
2006 .set_wptr = vcn_v3_0_enc_ring_set_wptr,
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| A D | si_dma.c | 727 .set_wptr = si_dma_ring_set_wptr,
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| A D | uvd_v7_0.c | 1808 .set_wptr = uvd_v7_0_ring_set_wptr,
1841 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
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| A D | vcn_v1_0.c | 1983 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2018 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
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| A D | vcn_v2_0.c | 2020 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2051 .set_wptr = vcn_v2_0_enc_ring_set_wptr,
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| A D | sdma_v2_4.c | 1136 .set_wptr = sdma_v2_4_ring_set_wptr,
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| A D | cik_sdma.c | 1248 .set_wptr = cik_sdma_ring_set_wptr,
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| A D | vce_v4_0.c | 1109 .set_wptr = vce_v4_0_ring_set_wptr,
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| A D | mes_v10_1.c | 85 .set_wptr = mes_v10_1_ring_set_wptr,
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| A D | mes_v11_0.c | 88 .set_wptr = mes_v11_0_ring_set_wptr,
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Completed in 56 milliseconds
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